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| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-12-23 23:31:30 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-12-25 03:24:56 +0100 |
| commit | 5b63dc1ff822e56ebabcb60fa4afd46f7f7e08c3 (patch) | |
| tree | 3d4e98bcaaa02e5aaa6d8b80570cbd0033adb0ae /src/soc/samsung/exynos5250 | |
| parent | d4665ae0c28be7c283e40264c3dfa3038dd4971c (diff) | |
| download | coreboot-5b63dc1ff822e56ebabcb60fa4afd46f7f7e08c3.tar.xz | |
soc/samsung/exynos: Make 'ps_hold_setup()' static
Change-Id: I272fea9c2767c341e8a545bf7a9ac18eefa2bda5
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7917
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'src/soc/samsung/exynos5250')
| -rw-r--r-- | src/soc/samsung/exynos5250/power.c | 1 | ||||
| -rw-r--r-- | src/soc/samsung/exynos5250/setup.h | 2 |
2 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/samsung/exynos5250/power.c b/src/soc/samsung/exynos5250/power.c index fb45dc0dd4..27089c66d9 100644 --- a/src/soc/samsung/exynos5250/power.c +++ b/src/soc/samsung/exynos5250/power.c @@ -24,6 +24,7 @@ #include <halt.h> #include "power.h" +/* Set the PS-Hold drive value */ static void ps_hold_setup(void) { /* Set PS-Hold high */ diff --git a/src/soc/samsung/exynos5250/setup.h b/src/soc/samsung/exynos5250/setup.h index c65747b775..274ceb1ad0 100644 --- a/src/soc/samsung/exynos5250/setup.h +++ b/src/soc/samsung/exynos5250/setup.h @@ -741,8 +741,6 @@ void dmc_config_prech(struct mem_timings *mem, struct exynos5_dmc *dmc); */ void dmc_config_memory(struct mem_timings *mem, struct exynos5_dmc *dmc); -/* Set the PS-Hold drive value */ -void ps_hold_setup(void); /* * Reset the DLL. This function is common between DDR3 and LPDDR2. * However, the reset value is different. So we are passing a flag |