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author | Martin Roth <martin.roth@se-eng.com> | 2014-12-07 14:59:11 -0700 |
---|---|---|
committer | Martin Roth <gaumless@gmail.com> | 2014-12-08 05:39:07 +0100 |
commit | 1fc2ba5e6d85f3c7eef00a7e6b0b3ee1352fbfa9 (patch) | |
tree | c943575806918a817060c0fc638625b42294733e /src/soc/samsung/exynos5420/dmc_common.c | |
parent | de7ed6fc7cdb3f55894e613bdc0c394fa8f57494 (diff) | |
download | coreboot-1fc2ba5e6d85f3c7eef00a7e6b0b3ee1352fbfa9.tar.xz |
samsung/exynos5420: Spelling Fixes
Change-Id: I966645c83ae78943a7dbb9dc05af4fded6f4e5b5
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7703
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/soc/samsung/exynos5420/dmc_common.c')
-rw-r--r-- | src/soc/samsung/exynos5420/dmc_common.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/samsung/exynos5420/dmc_common.c b/src/soc/samsung/exynos5420/dmc_common.c index 433312eb3e..e651b7f947 100644 --- a/src/soc/samsung/exynos5420/dmc_common.c +++ b/src/soc/samsung/exynos5420/dmc_common.c @@ -63,7 +63,7 @@ int dmc_config_zq(struct mem_timings *mem, val &= ~ZQ_MANUAL_STR; /* - * Since we are manaully calibrating the ZQ values, + * Since we are manually calibrating the ZQ values, * we are looping for the ZQ_init to complete. */ i = ZQ_INIT_TIMEOUT; @@ -96,12 +96,12 @@ void update_reset_dll(struct exynos5_dmc *dmc, enum ddr_mode mode) writel(val, &dmc->phycontrol0); } - /* Update DLL Information: Force DLL Resyncronization */ + /* Update DLL Information: Force DLL Resynchronization */ val = readl(&dmc->phycontrol0); val |= FP_RSYNC; writel(val, &dmc->phycontrol0); - /* Reset Force DLL Resyncronization */ + /* Reset Force DLL Resynchronization */ val = readl(&dmc->phycontrol0); val &= ~FP_RSYNC; writel(val, &dmc->phycontrol0); |