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author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2017-07-13 02:20:27 +0200 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2017-07-13 19:45:59 +0000 |
commit | 6a00113de8b9060a7227bcfa79b3786e3e592a33 (patch) | |
tree | 467f5653272ed2d16f6d8033ed8cd0e7391fb426 /src/soc/samsung/exynos5420/include | |
parent | 9f244a5494192707bfbb72e60f17411e9a35434a (diff) | |
download | coreboot-6a00113de8b9060a7227bcfa79b3786e3e592a33.tar.xz |
Rename __attribute__((packed)) --> __packed
Also unify __attribute__ ((..)) to __attribute__((..)) and
handle ((__packed__)) like ((packed))
Change-Id: Ie60a51c3fa92b5009724a5b7c2932e361bf3490c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/15921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/samsung/exynos5420/include')
-rw-r--r-- | src/soc/samsung/exynos5420/include/soc/dmc.h | 8 | ||||
-rw-r--r-- | src/soc/samsung/exynos5420/include/soc/power.h | 3 |
2 files changed, 7 insertions, 4 deletions
diff --git a/src/soc/samsung/exynos5420/include/soc/dmc.h b/src/soc/samsung/exynos5420/include/soc/dmc.h index ef0198c92f..b19b660936 100644 --- a/src/soc/samsung/exynos5420/include/soc/dmc.h +++ b/src/soc/samsung/exynos5420/include/soc/dmc.h @@ -14,6 +14,8 @@ #ifndef CPU_SAMSUNG_EXYNOS5420_DMC_H #define CPU_SAMSUNG_EXYNOS5420_DMC_H +#include <compiler.h> + #define DMC_INTERLEAVE_SIZE 0x1f #define PAD_RETENTION_DRAM_COREBLK_VAL 0x10000000 @@ -201,7 +203,7 @@ struct exynos5_dmc { uint32_t pmcnt2_ppc; uint8_t res41[0xc]; uint32_t pmcnt3_ppc; /* 0xe140 */ -} __attribute__((packed)); +} __packed; check_member(exynos5_dmc, pmcnt3_ppc, 0xe140); static struct exynos5_dmc * const exynos_drex0 = (void *)EXYNOS5420_DMC_DREXI_0; @@ -252,7 +254,7 @@ struct exynos5_phy_control { uint32_t phy_con40; uint32_t phy_con41; uint32_t phy_con42; -} __attribute__((packed)); +} __packed; check_member(exynos5_phy_control, phy_con42, 0xac); static struct exynos5_phy_control * const exynos_phy0_control = @@ -267,7 +269,7 @@ struct exynos5_tzasc { uint8_t res2[0x8]; uint32_t memconfig0; uint32_t memconfig1; -} __attribute__((packed)); +} __packed; static struct exynos5_tzasc * const exynos_tzasc0 = (void *)EXYNOS5420_DMC_TZASC_0; diff --git a/src/soc/samsung/exynos5420/include/soc/power.h b/src/soc/samsung/exynos5420/include/soc/power.h index 5920916b0e..4fb96fd941 100644 --- a/src/soc/samsung/exynos5420/include/soc/power.h +++ b/src/soc/samsung/exynos5420/include/soc/power.h @@ -18,6 +18,7 @@ #ifndef CPU_SAMSUNG_EXYNOS5420_POWER_H #define CPU_SAMSUNG_EXYNOS5420_POWER_H +#include <compiler.h> #include <soc/cpu.h> /* Enable HW thermal trip with PS_HOLD_CONTROL register ENABLE_HW_TRIP bit */ @@ -72,7 +73,7 @@ struct exynos5_power { uint32_t padret_dram_cblk_opt; /* 0x31e8 */ uint8_t reservedC[0x120]; uint32_t ps_hold_ctrl; /* 0x330c */ -} __attribute__ ((__packed__)); +} __packed; check_member(exynos5_power, ps_hold_ctrl, 0x330c); static struct exynos5_power * const exynos_power = (void*)EXYNOS5_POWER_BASE; |