diff options
author | Julius Werner <jwerner@chromium.org> | 2015-02-19 14:51:15 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-21 08:22:28 +0200 |
commit | 2f37bd65518865688b9234afce0d467508d6f465 (patch) | |
tree | eba5ed799de966299602b30c70d51dd40eaadd73 /src/soc/samsung/exynos5420/tmu.c | |
parent | 1f60f971fc89ef841e81b978964b38278d597b1d (diff) | |
download | coreboot-2f37bd65518865688b9234afce0d467508d6f465.tar.xz |
arm(64): Globally replace writel(v, a) with write32(a, v)
This patch is a raw application of the following spatch to src/:
@@
expression A, V;
@@
- writel(V, A)
+ write32(A, V)
@@
expression A, V;
@@
- writew(V, A)
+ write16(A, V)
@@
expression A, V;
@@
- writeb(V, A)
+ write8(A, V)
@@
expression A;
@@
- readl(A)
+ read32(A)
@@
expression A;
@@
- readb(A)
+ read8(A)
BRANCH=none
BUG=chromium:444723
TEST=None (depends on next patch)
Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6
Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254864
Reviewed-on: http://review.coreboot.org/9836
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/samsung/exynos5420/tmu.c')
-rw-r--r-- | src/soc/samsung/exynos5420/tmu.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/soc/samsung/exynos5420/tmu.c b/src/soc/samsung/exynos5420/tmu.c index 8ed78bba4a..19c72fdac3 100644 --- a/src/soc/samsung/exynos5420/tmu.c +++ b/src/soc/samsung/exynos5420/tmu.c @@ -80,7 +80,7 @@ static int get_cur_temp(struct tmu_info *info) struct tmu_reg *reg = (struct tmu_reg *)info->tmu_base; /* Temperature code range between min 25 and max 125 */ - cur_temp = readl(®->current_temp) & 0xff; + cur_temp = read32(®->current_temp) & 0xff; /* Calibrate current temperature */ if (cur_temp) @@ -142,10 +142,10 @@ static void tmu_setup_parameters(struct tmu_info *info) struct tmu_reg *reg = (struct tmu_reg *)info->tmu_base; /* Must reload for using efuse value at EXYNOS */ - writel(TRIMINFO_RELOAD, ®->triminfo_control); + write32(®->triminfo_control, TRIMINFO_RELOAD); /* Get the compensation parameter */ - te_temp = readl(®->triminfo); + te_temp = read32(®->triminfo); info->te1 = te_temp & TRIM_INFO_MASK; info->te2 = ((te_temp >> 8) & TRIM_INFO_MASK); @@ -169,8 +169,8 @@ static void tmu_setup_parameters(struct tmu_info *info) (hwtrip_code << 24)); /* Set interrupt level */ - writel(rising_value, ®->threshold_temp_rise); - writel(cooling_temp, ®->threshold_temp_fall); + write32(®->threshold_temp_rise, rising_value); + write32(®->threshold_temp_fall, cooling_temp); /* * Need to init all register settings after getting parameter info @@ -183,20 +183,20 @@ static void tmu_setup_parameters(struct tmu_info *info) * TODO(bhthompson): rewrite this code such that we are not performing * a hard wipe of tmu_control and re verify functionality. */ - writel(data->slope, ®->tmu_control); + write32(®->tmu_control, data->slope); - writel(INTCLEARALL, ®->intclear); + write32(®->intclear, INTCLEARALL); /* TMU core enable */ - con = readl(®->tmu_control); + con = read32(®->tmu_control); con |= (info->tmu_mux << 20) | THERM_TRIP_EN | CORE_EN; - writel(con, ®->tmu_control); + write32(®->tmu_control, con); /* Enable HW thermal trip */ power_enable_hw_thermal_trip(); /* LEV1 LEV2 interrupt enable */ - writel(INTEN_RISE1 | INTEN_RISE2, ®->inten); + write32(®->inten, INTEN_RISE1 | INTEN_RISE2); } /* |