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| author | Martin Roth <martinroth@google.com> | 2017-06-03 20:03:18 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2017-06-07 12:09:15 +0200 |
| commit | e18e6427d0f3261f9ec361d4418b8fe1dd7cc469 (patch) | |
| tree | f6a10fc93dddada7e49108a5ad06e71590f2d54c /src/soc/samsung/exynos5420 | |
| parent | e81ce0483db982c741eebdda649111eee22a853b (diff) | |
| download | coreboot-e18e6427d0f3261f9ec361d4418b8fe1dd7cc469.tar.xz | |
src: change coreboot to lowercase
The word 'coreboot' should always be written in lowercase, even at the
start of a sentence.
Change-Id: I7945ddb988262e7483da4e623cedf972380e65a2
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20029
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/samsung/exynos5420')
| -rw-r--r-- | src/soc/samsung/exynos5420/alternate_cbfs.c | 2 | ||||
| -rw-r--r-- | src/soc/samsung/exynos5420/smp.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/samsung/exynos5420/alternate_cbfs.c b/src/soc/samsung/exynos5420/alternate_cbfs.c index 3a40154c11..183c3710ef 100644 --- a/src/soc/samsung/exynos5420/alternate_cbfs.c +++ b/src/soc/samsung/exynos5420/alternate_cbfs.c @@ -27,7 +27,7 @@ #include <symbols.h> /* This allows USB A-A firmware upload from a compatible host in four parts: - * The first two are the bare BL1 and the Coreboot boot block, which are just + * The first two are the bare BL1 and the coreboot boot block, which are just * written to their respective loading addresses. These transfers are initiated * by the IROM / BL1, so this code has nothing to do with them. * diff --git a/src/soc/samsung/exynos5420/smp.c b/src/soc/samsung/exynos5420/smp.c index 7731857e73..7086da847f 100644 --- a/src/soc/samsung/exynos5420/smp.c +++ b/src/soc/samsung/exynos5420/smp.c @@ -182,7 +182,7 @@ static void core_start_execution(void) if (cpu_state & CORE_STATE_RESET) { /* For Reset, U-Boot jumps to its starting address; - * on Coreboot, seems ok to ignore for now. */ + * on coreboot, seems ok to ignore for now. */ } wait_and_jump(&exynos_cpu_states->hotplug_address); /* never returns. */ |