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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-12-23 23:31:30 +1100
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-12-25 03:24:56 +0100
commit5b63dc1ff822e56ebabcb60fa4afd46f7f7e08c3 (patch)
tree3d4e98bcaaa02e5aaa6d8b80570cbd0033adb0ae /src/soc/samsung
parentd4665ae0c28be7c283e40264c3dfa3038dd4971c (diff)
downloadcoreboot-5b63dc1ff822e56ebabcb60fa4afd46f7f7e08c3.tar.xz
soc/samsung/exynos: Make 'ps_hold_setup()' static
Change-Id: I272fea9c2767c341e8a545bf7a9ac18eefa2bda5 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7917 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'src/soc/samsung')
-rw-r--r--src/soc/samsung/exynos5250/power.c1
-rw-r--r--src/soc/samsung/exynos5250/setup.h2
-rw-r--r--src/soc/samsung/exynos5420/power.c3
-rw-r--r--src/soc/samsung/exynos5420/setup.h2
4 files changed, 3 insertions, 5 deletions
diff --git a/src/soc/samsung/exynos5250/power.c b/src/soc/samsung/exynos5250/power.c
index fb45dc0dd4..27089c66d9 100644
--- a/src/soc/samsung/exynos5250/power.c
+++ b/src/soc/samsung/exynos5250/power.c
@@ -24,6 +24,7 @@
#include <halt.h>
#include "power.h"
+/* Set the PS-Hold drive value */
static void ps_hold_setup(void)
{
/* Set PS-Hold high */
diff --git a/src/soc/samsung/exynos5250/setup.h b/src/soc/samsung/exynos5250/setup.h
index c65747b775..274ceb1ad0 100644
--- a/src/soc/samsung/exynos5250/setup.h
+++ b/src/soc/samsung/exynos5250/setup.h
@@ -741,8 +741,6 @@ void dmc_config_prech(struct mem_timings *mem, struct exynos5_dmc *dmc);
*/
void dmc_config_memory(struct mem_timings *mem, struct exynos5_dmc *dmc);
-/* Set the PS-Hold drive value */
-void ps_hold_setup(void);
/*
* Reset the DLL. This function is common between DDR3 and LPDDR2.
* However, the reset value is different. So we are passing a flag
diff --git a/src/soc/samsung/exynos5420/power.c b/src/soc/samsung/exynos5420/power.c
index a7e5262e12..7d947121de 100644
--- a/src/soc/samsung/exynos5420/power.c
+++ b/src/soc/samsung/exynos5420/power.c
@@ -26,7 +26,8 @@
#include "power.h"
#include "setup.h"
-void ps_hold_setup(void)
+/* Set the PS-Hold drive value */
+static void ps_hold_setup(void)
{
/* Set PS-Hold high */
setbits_le32(&exynos_power->ps_hold_ctrl,
diff --git a/src/soc/samsung/exynos5420/setup.h b/src/soc/samsung/exynos5420/setup.h
index e0a7d1b0a8..e7b5bd2e08 100644
--- a/src/soc/samsung/exynos5420/setup.h
+++ b/src/soc/samsung/exynos5420/setup.h
@@ -874,8 +874,6 @@ void dmc_config_prech(struct mem_timings *mem, struct exynos5_dmc *dmc);
*/
void dmc_config_memory(struct mem_timings *mem, struct exynos5_dmc *dmc);
-/* Set the PS-Hold drive value */
-void ps_hold_setup(void);
/*
* Reset the DLL. This function is common between DDR3 and LPDDR2.
* However, the reset value is different. So we are passing a flag