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author | Usha P <usha.p@intel.com> | 2019-11-08 16:00:40 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2019-11-22 06:26:27 +0000 |
commit | 56715ec23f6c34ae4bda3ac197aba0d90af06660 (patch) | |
tree | 5fe15ad1ebd88a9389dc0d5f8b3f39c754d4d92c /src/soc/sifive | |
parent | f8dc4bc0224f18a33fcf19e3d754ac96a383a863 (diff) | |
download | coreboot-56715ec23f6c34ae4bda3ac197aba0d90af06660.tar.xz |
soc/intel/skylake: Refactor pch_early_init() code
This patch keeps required pch_early_init() function like ABASE programming,
GPE and RTC init into bootblock and moves remaining functions like
TCO configuration and SMBUS init into romstage/pch.c in order to maintain
only required chipset programming for bootblock and verstage.
TEST=Able to build and boot soraka.
Change-Id: Idf7b04edc3fce147f7857591ce7d5a0cd03f43fe
Signed-off-by: Usha P <usha.p@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36672
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/sifive')
0 files changed, 0 insertions, 0 deletions