mb/emulation/spike-riscv: Implement mtime_init

This patch lets spike boot to "Payload not loaded" again.

Because soc/ucb/riscv/ does not represent a real SoC, but is a dummy
directory for emulators, and different emulators might have different
memory maps, I moved mtime_init to the mainboard-specific directories
for Spike and QEMU.

Change-Id: I080f7f81df752e25478bd277637bf894bbee4cb2
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/28873
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Hug <philipp@hug.cx>

2 files changed, 0 insertions, 24 deletions

diff --git a/src/soc/ucb/riscv/Makefile.inc b/src/soc/ucb/riscv/Makefile.inc
index c96e3637b7..ef03642d89 100644
--- a/src/soc/ucb/riscv/Makefile.inc
+++ b/src/soc/ucb/riscv/Makefile.inc
@@ -1,13 +1,11 @@
 ifeq ($(CONFIG_SOC_UCB_RISCV),y)
 
-bootblock-y += mtime.c
 bootblock-y += ipi.c
 
 romstage-y += cbmem.c
 romstage-y += ipi.c
 
 ramstage-y += cbmem.c
-ramstage-y += mtime.c
 ramstage-y += ipi.c
 
 endif
diff --git a/src/soc/ucb/riscv/mtime.c b/src/soc/ucb/riscv/mtime.c
deleted file mode 100644
index f8c2717563..0000000000
--- a/src/soc/ucb/riscv/mtime.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2018 HardenedLinux
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <mcall.h>
-
-/* FIXME: This is an empty implementation, please improve */
-/* This function is used to initialize HLS()->time/HLS()->timecmp  */
-void mtime_init(void)
-{
-}