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| author | Aaron Durbin <adurbin@chromium.org> | 2020-04-09 15:24:50 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-01 06:59:22 +0000 |
| commit | 09f60ff0e259664c174070a6ed444bd3e11883c5 (patch) | |
| tree | 5961662e16df2d6551214835b9e5602ee241fc5b /src/soc | |
| parent | 4cf3af49cadafb00fe6370fd3057ea6b2c25608a (diff) | |
| download | coreboot-09f60ff0e259664c174070a6ed444bd3e11883c5.tar.xz | |
soc/amd/picasso: initialize i2c controllers in SoC flow
BUG=b:153642124
TEST=Saw I2C communication
Change-Id: I31f8b97d1ff7b687d7e078d5b594d1ad73c815e7
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2145457
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40868
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/picasso/southbridge.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/southbridge.c b/src/soc/amd/picasso/southbridge.c index d37f143313..0d54294543 100644 --- a/src/soc/amd/picasso/southbridge.c +++ b/src/soc/amd/picasso/southbridge.c @@ -467,6 +467,7 @@ BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, set_nvs_sws, NULL); void southbridge_init(void *chip_info) { + i2c_soc_init(); sb_init_acpi_ports(); acpi_clear_pm1_status(); } |