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authorPatrick Rudolph <patrick.rudolph@9elements.com>2020-03-20 09:30:57 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-23 09:36:53 +0000
commit12b86b6433a9707580c485067e2ceba83e513417 (patch)
tree6e110a43854500ca1ba17b16e6203aa030e51a74 /src/soc
parent6975e07997cedf8a78f0704a461765dfe2a09fe6 (diff)
downloadcoreboot-12b86b6433a9707580c485067e2ceba83e513417.tar.xz
soc/intel/cfl/vr_config: Add 8-core desktop CPU support
Add 8-core desktop CPU support by adding the corresponding PCI IDs. Tested using "Intel Core(TM) i7-9700E". Change-Id: I7a2e2e5fd1796deff81b032450242fb58031526d Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39691 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/cannonlake/vr_config.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/vr_config.c b/src/soc/intel/cannonlake/vr_config.c
index 21a8ae2c46..af3f1ecd0d 100644
--- a/src/soc/intel/cannonlake/vr_config.c
+++ b/src/soc/intel/cannonlake/vr_config.c
@@ -202,6 +202,7 @@ static uint16_t get_sku_icc_max(int domain)
return icc_max[domain];
}
+ case PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_8: /* fallthrough */
case PCI_DEVICE_ID_INTEL_CFL_ID_S_S_8: {
uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(11.1, 193, 45, 45);
@@ -356,6 +357,7 @@ static uint16_t get_sku_ac_dc_loadline(const int domain)
}
return loadline[domain];
}
+ case PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_8: /* fallthrough */
case PCI_DEVICE_ID_INTEL_CFL_ID_S_S_8: {
/* FIXME: Loadline isn't specified for S-series, using H-series default */
const uint16_t loadline[NUM_VR_DOMAINS] =