diff options
| author | Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com> | 2016-10-31 17:15:30 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-11-02 18:28:06 +0100 |
| commit | 1a5e32c92966e69399acd154abf9c9e513373ce6 (patch) | |
| tree | bc3f758ada51879b212b4f0460c08bd5be8b95ba /src/soc | |
| parent | 362180a8a99705caedf9e2843a43d898cb1960af (diff) | |
| download | coreboot-1a5e32c92966e69399acd154abf9c9e513373ce6.tar.xz | |
soc/intel/apollolake: Skip FSP initiated core/MP init
Enable skip FSP initiated core/MP init as it is
implemented in coreboot.
BUG=chrome-os-partner:56922
BRANCH=None
Change-Id: I9417dab3135ca1e0104fc3bde63518288bcfa76a
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
Reviewed-on: https://review.coreboot.org/17201
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/apollolake/chip.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 181d4d68bc..12aea77289 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -465,6 +465,8 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd) /* Disable monitor mwait since it is broken due to a hardware bug without a fix */ silconfig->MonitorMwaitEnable = 0; + silconfig->SkipMpInit = 1; + /* Disable setting of EISS bit in FSP. */ silconfig->SpiEiss = 0; |