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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-07-30 13:23:32 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-08-07 12:35:42 +0000
commit6683e409d3688217e70f1f19deab152790b0f495 (patch)
tree965070f130e9b367631c746ab219aa73f3569238 /src/soc
parentd1a0c5770803e45dabecf6094fccb9895ea76d10 (diff)
downloadcoreboot-6683e409d3688217e70f1f19deab152790b0f495.tar.xz
usbdebug: Refactor early enable
Always sanity check for EHCI class device and move PCI function power enablement up. Change-Id: I1eebe813fbb420738af2d572178213fc660f392a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/20826 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/stoneyridge/enable_usbdebug.c12
-rw-r--r--src/soc/intel/broadwell/usb_debug.c13
2 files changed, 5 insertions, 20 deletions
diff --git a/src/soc/amd/stoneyridge/enable_usbdebug.c b/src/soc/amd/stoneyridge/enable_usbdebug.c
index db1e4cf231..7ed6721a48 100644
--- a/src/soc/amd/stoneyridge/enable_usbdebug.c
+++ b/src/soc/amd/stoneyridge/enable_usbdebug.c
@@ -26,6 +26,10 @@
pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
{
+ /* Enable all of the USB controllers */
+ outb(0xEF, PM_INDEX);
+ outb(0x7F, PM_DATA);
+
if (hcd_idx == 3)
return PCI_DEV(0, 0x16, 0);
else if (hcd_idx == 2)
@@ -46,11 +50,3 @@ void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
reg32 |= (1 << 27); /* Enable Debug Port port number remapping. */
write32(base_regs + DEBUGPORT_MISC_CONTROL, reg32);
}
-
-
-void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base)
-{
- /* Enable all of the USB controllers */
- outb(0xEF, PM_INDEX);
- outb(0x7F, PM_DATA);
-}
diff --git a/src/soc/intel/broadwell/usb_debug.c b/src/soc/intel/broadwell/usb_debug.c
index b19462dc3e..9580a5c90d 100644
--- a/src/soc/intel/broadwell/usb_debug.c
+++ b/src/soc/intel/broadwell/usb_debug.c
@@ -24,21 +24,10 @@
pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
{
- u32 class;
- pci_devfn_t dev = PCI_DEV(0, 0x1d, 0);
-
- class = pci_read_config32(dev, PCI_CLASS_REVISION) >> 8;
- if (class != PCI_EHCI_CLASSCODE)
- return 0;
-
- return dev;
+ return PCI_DEV(0, 0x1d, 0);
}
void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
{
/* Hardcoded to physical port 1 */
}
-
-void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base)
-{
-}