diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2021-01-16 17:33:18 +0100 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2021-01-26 20:52:35 +0000 |
| commit | 6c78420bcb0444f62ac41f9f0f4d0e1f4c9dd48c (patch) | |
| tree | a3247a5c119fdd85fd5d0b5649011b96274477b0 /src/soc | |
| parent | f984aecc02a42575c24412f500c432bb9f0f8432 (diff) | |
| download | coreboot-6c78420bcb0444f62ac41f9f0f4d0e1f4c9dd48c.tar.xz | |
soc/intel/braswell/romstage/romstage.c: Use __func__
Change-Id: I07d36fb9b499e64eaba8829073c040792a2fee6e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49559
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/braswell/romstage/romstage.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c index 5a1aa0ae73..daa1b2d19f 100644 --- a/src/soc/intel/braswell/romstage/romstage.c +++ b/src/soc/intel/braswell/romstage/romstage.c @@ -105,9 +105,8 @@ void soc_memory_init_params(struct romstage_params *params, MEMORY_INIT_UPD *upd dev = pcidev_on_root(LPC_DEV, LPC_FUNC); if (!dev) { - printk(BIOS_ERR, - "Error! Device (PCI:0:%02x.%01x) not found, soc_memory_init_params!\n", - LPC_DEV, LPC_FUNC); + printk(BIOS_ERR, "Error! Device (PCI:0:%02x.%01x) not found, %s!\n", + LPC_DEV, LPC_FUNC, __func__); return; } |