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authorJulius Werner <jwerner@chromium.org>2017-03-16 19:21:51 -0700
committerJulius Werner <jwerner@chromium.org>2017-03-28 22:14:03 +0200
commit94d9411415e624f70ba8451886e5b96a1f56b159 (patch)
treee38a16364600508d41114d7de582cd4445289932 /src/soc
parent1210b41283f70ea2a8b562da940f853442f292ab (diff)
downloadcoreboot-94d9411415e624f70ba8451886e5b96a1f56b159.tar.xz
vboot: Remove CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL Kconfig option
CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL allows the SoC directory to provide its own main() symbol that can execute code before the generic verstage code runs. We have now established in other places (e.g. T210 ramstage) a sort of convention that SoCs which need to run code in any stage before main() should just override stage_entry() instead. This patch aligns the verstage with that model and gets rid of the extra Kconfig option. This also removes the need for aliasing between main() and verstage(). Like other stages the main verstage code is now just in main() and can be called from stage_entry(). Change-Id: If42c9c4fbab51fbd474e1530023a30b69495d1d6 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/18978 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/nvidia/tegra124/Kconfig1
-rw-r--r--src/soc/nvidia/tegra124/verstage.c4
2 files changed, 2 insertions, 3 deletions
diff --git a/src/soc/nvidia/tegra124/Kconfig b/src/soc/nvidia/tegra124/Kconfig
index 227efca3fe..fdbbc7fc6c 100644
--- a/src/soc/nvidia/tegra124/Kconfig
+++ b/src/soc/nvidia/tegra124/Kconfig
@@ -20,7 +20,6 @@ config CHROMEOS
select VBOOT_OPROM_MATTERS
select VBOOT_STARTS_IN_BOOTBLOCK
select SEPARATE_VERSTAGE
- select CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL
config TEGRA124_MODEL_TD570D
bool "TD570D"
diff --git a/src/soc/nvidia/tegra124/verstage.c b/src/soc/nvidia/tegra124/verstage.c
index 9eee0646f9..526f14e066 100644
--- a/src/soc/nvidia/tegra124/verstage.c
+++ b/src/soc/nvidia/tegra124/verstage.c
@@ -45,9 +45,9 @@ void verstage_mainboard_init(void)
early_mainboard_init();
}
-void main(void)
+void stage_entry(void)
{
asm volatile ("bl arm_init_caches"
: : : "r0", "r1", "r2", "r3", "r4", "r5", "ip");
- verstage();
+ main();
}