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authorSubrata Banik <subrata.banik@intel.com>2017-08-30 11:47:32 +0530
committerAaron Durbin <adurbin@chromium.org>2017-08-30 18:30:56 +0000
commitb045d4cd7bc9337e34cf29dd1e57c3f6647c7ca7 (patch)
tree89ff6fe3915cd6c2e113d38dddbd16f4c29b7656 /src/soc
parent3ed5969661980f17f3adcdef73c6a8aff4b34f6d (diff)
downloadcoreboot-b045d4cd7bc9337e34cf29dd1e57c3f6647c7ca7.tar.xz
soc/intel/{cannonlake,skylake}: Add active default value for UART_FOR_CONSOLE
This patch to avoid build bot hang issue due to no active default value for UART_FOR_CONSOLE kconfig option. Change-Id: I70ca5dc6c4bde6a119ad59d8c58955c96c042198 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/21287 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/cannonlake/Kconfig1
-rw-r--r--src/soc/intel/skylake/Kconfig1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 65b581eed0..df3cda1891 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -65,6 +65,7 @@ config UART_DEBUG
config UART_FOR_CONSOLE
int "Index for LPSS UART port to use for console"
default 2 if DRIVERS_UART_8250MEM
+ default 0
help
Index for LPSS UART port to use for console:
0 = LPSS UART0, 1 = LPSS UART1, 2 = LPSS UART2
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 7a3c3a6995..4927eac38c 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -203,6 +203,7 @@ config UART_DEBUG
config UART_FOR_CONSOLE
int "Index for LPSS UART port to use for console"
default 2 if DRIVERS_UART_8250MEM
+ default 0
help
Index for LPSS UART port to use for console:
0 = LPSS UART0, 1 = LPSS UART1, 2 = LPSS UART2