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| author | CK Hu <ck.hu@mediatek.com> | 2020-07-01 15:01:04 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-10-28 02:01:10 +0000 |
| commit | bd0a222ab44277ab48b8bf95419ae310b8ccf82e (patch) | |
| tree | 8e3b9404998932635c9f672589232c5f74f1cbb8 /src/soc | |
| parent | fc38e8834132f83ed59e6b0f59bd90c940edd991 (diff) | |
| download | coreboot-bd0a222ab44277ab48b8bf95419ae310b8ccf82e.tar.xz | |
mb/google/asurada: Pass reset gpio parameter to BL31
To support gpio reset SoC, we need to pass the reset gpio parameter to
BL31.
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Change-Id: I2ae7684a61af76693605cc0bcf8d20c8992c7bff
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46388
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
0 files changed, 0 insertions, 0 deletions