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authorPratik Prajapati <pratikkumar.v.prajapati@intel.com>2017-08-28 12:27:57 -0700
committerMartin Roth <martinroth@google.com>2017-09-02 15:20:03 +0000
commite816315ee295d5404fff041e59c53bf78f20cdf0 (patch)
tree8dd3f079acd7f36834e87f7cf10a6ad094e5fa18 /src/soc
parent4e203070523a04f10252a0bb68cb4467b32748fc (diff)
downloadcoreboot-e816315ee295d5404fff041e59c53bf78f20cdf0.tar.xz
soc/intel/skylake: Use common mca_configure() API
Use mca_configure() API from cpulib to configure Intel Machine Check Architecture (MCA) Change-Id: Ia96cb82fff3def46dbecb09dee94de86f179abe6 Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/21240 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/skylake/cpu.c28
1 files changed, 4 insertions, 24 deletions
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 031a01de66..0ad5dc9a72 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -324,29 +324,6 @@ static void set_energy_perf_bias(u8 policy)
printk(BIOS_DEBUG, "cpu: energy policy set to %u\n", policy);
}
-static void configure_mca(void)
-{
- msr_t msr;
- int i;
- int num_banks;
-
- msr = rdmsr(IA32_MCG_CAP);
- num_banks = msr.lo & 0xff;
- msr.lo = msr.hi = 0;
- /*
- * TODO(adurbin): This should only be done on a cold boot. Also, some
- * of these banks are core vs package scope. For now every CPU clears
- * every bank.
- */
- for (i = 0; i < num_banks; i++) {
- /* Clear the machine check status */
- wrmsr(IA32_MC0_STATUS + (i * 4), msr);
- /* Initialize machine checks */
- wrmsr(IA32_MC0_CTL + i * 4,
- (msr_t) {.lo = 0xffffffff, .hi = 0xffffffff});
- }
-}
-
static void configure_c_states(void)
{
msr_t msr;
@@ -410,7 +387,10 @@ static void enable_pm_timer_emulation(void)
void soc_core_init(device_t cpu)
{
/* Clear out pending MCEs */
- configure_mca();
+ /* TODO(adurbin): This should only be done on a cold boot. Also, some
+ * of these banks are core vs package scope. For now every CPU clears
+ * every bank. */
+ mca_configure();
/* Enable the local CPU apics */
enable_lapic_tpr();