diff options
| author | Martin Roth <martinroth@chromium.org> | 2021-03-23 13:34:49 -0600 |
|---|---|---|
| committer | Raul Rangel <rrangel@chromium.org> | 2021-04-05 00:44:19 +0000 |
| commit | f3314c20dede95a50d9c2ba2806c09b7f8728f03 (patch) | |
| tree | d5227d34a3cd887333bfe8465925edcaca8b6a1a /src/soc | |
| parent | 011bf1371562fd0a4cd232b64c03db828a48bace (diff) | |
| download | coreboot-f3314c20dede95a50d9c2ba2806c09b7f8728f03.tar.xz | |
soc/amd/cezanne: Clear eSPI ranges before configuring eSPI
The Cezanne PSP configures the eSPI with the assumption that it's a
majolica, setting up both the serial port and the majolica EC IO decode
ranges. Since guybrush is NOT a majolica, this doesn't work very well
there. Clearing the decode ranges allows the guybrush platform to set
the decode ranges needed for its EC.
BUG=b:183524609
TEST=Set up eSPI on Guybrush
Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: I77cfb948cb9ae6d1cf001bd9e66cede8d93f50b5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51749
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/cezanne/early_fch.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c index 0c72863ba3..acd2a7a1ce 100644 --- a/src/soc/amd/cezanne/early_fch.c +++ b/src/soc/amd/cezanne/early_fch.c @@ -68,6 +68,7 @@ void fch_early_init(void) lpc_disable_spi_rom_sharing(); if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) { + espi_clear_decodes(); espi_setup(); espi_configure_decodes(); } |