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authorFurquan Shaikh <furquan@chromium.org>2017-08-01 12:06:08 -0700
committerMartin Roth <martinroth@google.com>2017-08-04 15:29:40 +0000
commitf3bf7d0fb70cea8a8fc880d62e00a09d1539e0f9 (patch)
treee163b891dc22525215c8eb404c397e00ffb11d00 /src/soc
parent1679c42292ecfa3151fae8b7567b4c9d9e83ba75 (diff)
downloadcoreboot-f3bf7d0fb70cea8a8fc880d62e00a09d1539e0f9.tar.xz
soc/intel/common: Add lpss.c to ramstage
BUG=b:64030366 Change-Id: I7e05d65ebb3b6499451242521ffc61fc4c952830 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/20850 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/common/block/lpss/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/lpss/Makefile.inc b/src/soc/intel/common/block/lpss/Makefile.inc
index bb65bfea76..50d1c10850 100644
--- a/src/soc/intel/common/block/lpss/Makefile.inc
+++ b/src/soc/intel/common/block/lpss/Makefile.inc
@@ -1,3 +1,4 @@
bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c
romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c
verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c
+ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c