Replace hlt with halt()

There were instances of unneeded arch/hlt.h includes,
various hlt() calls that weren't supposed to exit (but
might have) and various forms of endless loops around
hlt() calls.

All these are sorted out now: unnecessary includes are
dropped, hlt() is uniformly replaced with halt() (except
in assembly, obviously).

Change-Id: I3d38fed6e8d67a28fdeb17be803d8c4b62d383c5
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7608
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

9 files changed, 13 insertions, 19 deletions

diff --git a/src/soc/intel/baytrail/smihandler.c b/src/soc/intel/baytrail/smihandler.c
index 22b60c42d3..62de9fad4a 100644
--- a/src/soc/intel/baytrail/smihandler.c
+++ b/src/soc/intel/baytrail/smihandler.c
@@ -19,13 +19,13 @@
 
 #include <stdint.h>
 #include <stdlib.h>
-#include <arch/hlt.h>
 #include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>
 #include <device/pci_def.h>
 #include <elog.h>
+#include <halt.h>
 
 #include <baytrail/pci_devs.h>
 #include <baytrail/pmc.h>
@@ -161,7 +161,7 @@ static void southbridge_smi_sleep(void)
 
 	/* Make sure to stop executing code here for S3/S4/S5 */
 	if (slp_typ > 1)
-		hlt();
+		halt();
 
 	/* In most sleep states, the code flow of this function ends at
 	 * the line above. However, if we entered sleep state S1 and wake
diff --git a/src/soc/intel/broadwell/bootblock/cpu.c b/src/soc/intel/broadwell/bootblock/cpu.c
index 11f1833fd0..da7b99df62 100644
--- a/src/soc/intel/broadwell/bootblock/cpu.c
+++ b/src/soc/intel/broadwell/bootblock/cpu.c
@@ -23,6 +23,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <arch/io.h>
+#include <halt.h>
 #include <cpu/intel/microcode/microcode.c>
 #include <broadwell/rcba.h>
 #include <broadwell/msr.h>
@@ -99,9 +100,7 @@ static void set_flex_ratio_to_tdp_nominal(void)
 	/* Issue warm reset, will be "CPU only" due to soft reset data */
 	outb(0x0, 0xcf9);
 	outb(0x6, 0xcf9);
-	while (1) {
-		asm("hlt");
-	}
+	halt();
 }
 
 static void check_for_clean_reset(void)
@@ -115,9 +114,7 @@ static void check_for_clean_reset(void)
 	if (msr.lo & (MTRRdefTypeEn | MTRRdefTypeFixEn)) {
 		outb(0x0, 0xcf9);
 		outb(0x6, 0xcf9);
-		while (1) {
-			asm("hlt");
-		}
+		halt();
 	}
 }
 
diff --git a/src/soc/intel/broadwell/me.c b/src/soc/intel/broadwell/me.c
index 15bcc348cd..2bdb1ed935 100644
--- a/src/soc/intel/broadwell/me.c
+++ b/src/soc/intel/broadwell/me.c
@@ -26,7 +26,6 @@
  */
 
 #include <arch/acpi.h>
-#include <arch/hlt.h>
 #include <arch/io.h>
 #include <console/console.h>
 #include <device/device.h>
diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c
index a5f688ea69..d4ebc08da8 100644
--- a/src/soc/intel/broadwell/romstage/raminit.c
+++ b/src/soc/intel/broadwell/romstage/raminit.c
@@ -18,7 +18,6 @@
  */
 
 #include <arch/cbfs.h>
-#include <arch/hlt.h>
 #include <arch/io.h>
 #include <cbfs.h>
 #include <cbmem.h>
diff --git a/src/soc/intel/broadwell/smihandler.c b/src/soc/intel/broadwell/smihandler.c
index 6acd07cdc0..85a4f47e44 100644
--- a/src/soc/intel/broadwell/smihandler.c
+++ b/src/soc/intel/broadwell/smihandler.c
@@ -20,7 +20,6 @@
 
 #include <delay.h>
 #include <types.h>
-#include <arch/hlt.h>
 #include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
@@ -28,6 +27,7 @@
 #include <cpu/x86/smm.h>
 #include <spi-generic.h>
 #include <elog.h>
+#include <halt.h>
 #include <pc80/mc146818rtc.h>
 #include <broadwell/lpc.h>
 #include <broadwell/nvs.h>
@@ -197,7 +197,7 @@ static void southbridge_smi_sleep(void)
 
 	/* Make sure to stop executing code here for S3/S4/S5 */
 	if (slp_typ > 1)
-		hlt();
+		halt();
 
 	/*
 	 * In most sleep states, the code flow of this function ends at
diff --git a/src/soc/intel/fsp_baytrail/smihandler.c b/src/soc/intel/fsp_baytrail/smihandler.c
index 2225964268..234a34f4e3 100644
--- a/src/soc/intel/fsp_baytrail/smihandler.c
+++ b/src/soc/intel/fsp_baytrail/smihandler.c
@@ -19,13 +19,13 @@
 
 #include <stdint.h>
 #include <stdlib.h>
-#include <arch/hlt.h>
 #include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>
 #include <device/pci_def.h>
 #include <elog.h>
+#include <halt.h>
 
 #include <baytrail/pci_devs.h>
 #include <baytrail/pmc.h>
@@ -161,7 +161,7 @@ static void southbridge_smi_sleep(void)
 
 	/* Make sure to stop executing code here for S3/S4/S5 */
 	if (slp_typ > 1)
-		hlt();
+		halt();
 
 	/* In most sleep states, the code flow of this function ends at
 	 * the line above. However, if we entered sleep state S1 and wake
diff --git a/src/soc/nvidia/tegra124/bootblock.c b/src/soc/nvidia/tegra124/bootblock.c
index 22024af90b..6acd5ad4d6 100644
--- a/src/soc/nvidia/tegra124/bootblock.c
+++ b/src/soc/nvidia/tegra124/bootblock.c
@@ -18,7 +18,6 @@
  */
 
 #include <arch/exception.h>
-#include <arch/hlt.h>
 #include <bootblock_common.h>
 #include <cbfs.h>
 #include <console/console.h>
diff --git a/src/soc/samsung/exynos5250/power.c b/src/soc/samsung/exynos5250/power.c
index c9d620a958..fb45dc0dd4 100644
--- a/src/soc/samsung/exynos5250/power.c
+++ b/src/soc/samsung/exynos5250/power.c
@@ -20,8 +20,8 @@
 /* Power setup code for EXYNOS5 */
 
 #include <arch/io.h>
-#include <arch/hlt.h>
 #include <console/console.h>
+#include <halt.h>
 #include "power.h"
 
 static void ps_hold_setup(void)
@@ -45,7 +45,7 @@ void power_shutdown(void)
 	clrbits_le32(&exynos_power->ps_hold_ctrl,
 		     POWER_PS_HOLD_CONTROL_DATA_HIGH);
 
-	hlt();
+	halt();
 }
 
 void power_enable_dp_phy(void)
diff --git a/src/soc/samsung/exynos5420/power.c b/src/soc/samsung/exynos5420/power.c
index ecaf208c9c..a7e5262e12 100644
--- a/src/soc/samsung/exynos5420/power.c
+++ b/src/soc/samsung/exynos5420/power.c
@@ -20,8 +20,8 @@
 /* Power setup code for EXYNOS5 */
 
 #include <arch/io.h>
-#include <arch/hlt.h>
 #include <console/console.h>
+#include <halt.h>
 #include "dmc.h"
 #include "power.h"
 #include "setup.h"
@@ -47,7 +47,7 @@ void power_shutdown(void)
 	clrbits_le32(&exynos_power->ps_hold_ctrl,
 		     POWER_PS_HOLD_CONTROL_DATA_HIGH);
 
-	hlt();
+	halt();
 }
 
 void power_enable_dp_phy(void)