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| author | Furquan Shaikh <furquan@chromium.org> | 2018-02-12 19:10:17 -0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2018-02-13 17:01:00 +0000 |
| commit | 01d0467af93029aa5e1e30e09c298344120c8998 (patch) | |
| tree | efca3c41da05b9bc8fa170fed941b516317945e1 /src/soc | |
| parent | ff0d8698c2111d405e845536757e9105cfe78e8e (diff) | |
| download | coreboot-01d0467af93029aa5e1e30e09c298344120c8998.tar.xz | |
mb/google/poppy: Fix the SPD for samsung_dimm_K4A8G165WB
Original SPD provided by the vendor had bytes after 254 shifted by 16
bytes. This change fixes the SPD data based on the latest details
received from the vendor.
BUG=b:72749394
TEST=Verified that the device with this memory part boots to OS fine.
Also, mosys is able to dump the right memory information.
Change-Id: I6938dea761c5785048aad69eeeaf50e2d0fa8ca1
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/23729
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
0 files changed, 0 insertions, 0 deletions