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authorAaron Durbin <adurbin@chromium.org>2015-05-01 16:48:54 -0500
committerPatrick Georgi <pgeorgi@google.com>2015-05-05 17:46:39 +0200
commit32bc18ef9772d006bea014d3e871e7353a438d55 (patch)
tree1d78b7399d3a80b820255db98e254b65fa7e586d /src/soc
parent8fb36c07ac4eb34da61894bba260ab57c4b7f9db (diff)
downloadcoreboot-32bc18ef9772d006bea014d3e871e7353a438d55.tar.xz
nvidia/tegra132: Fix vboot2 memory layout
bootblock et al were listed twice, which shouldn't happen. Change-Id: I3e6077d70e064ebe74bd4e5e3156f87d548c2fcb Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/10097 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld8
1 files changed, 3 insertions, 5 deletions
diff --git a/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld b/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld
index 2fdc38f320..18a86e6106 100644
--- a/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld
+++ b/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld
@@ -36,11 +36,9 @@ SECTIONS
PRERAM_CBFS_CACHE(0x40002000, 72K)
VBOOT2_WORK(0x40014000, 16K)
STACK(0x40018000, 2K)
- BOOTBLOCK(0x40019000, 20K)
- VERSTAGE(0x4001E000, 60K)
- BOOTBLOCK(0x40019000, 22K)
- VERSTAGE(0x4001E800, 58K)
- ROMSTAGE(0x4002D000, 76K)
+ BOOTBLOCK(0x40019000, 24K)
+ VERSTAGE(0x4001f000, 60K)
+ ROMSTAGE(0x4002e000, 72K)
SRAM_END(0x40040000)
DRAM_START(0x80000000)