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authorAaron Durbin <adurbin@chromium.org>2015-09-02 17:34:04 -0500
committerAaron Durbin <adurbin@chromium.org>2015-09-04 21:01:58 +0000
commit4d3de7e328fd92498fd7cf149a0aa887e33f8dfd (patch)
treeee9d7e90560ce453a801eb09f2c02a5b5c86a50b /src/soc
parentc6a177d50064a22215c8f682e1d16043d5470fa8 (diff)
downloadcoreboot-4d3de7e328fd92498fd7cf149a0aa887e33f8dfd.tar.xz
bootstate: remove need for #ifdef ENV_RAMSTAGE
The BOOT_STATE_INIT_ENTRY macro can only be used in ramstage, however the current state of the header meant bad build errors in non-ramstage. Therefore, people had to #ifdef in the source. Remove that requirement. Change-Id: I8755fc68bbaca6b72fbe8b4db4bcc1ccb35622bd Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11492 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/baytrail/spi.c2
-rw-r--r--src/soc/intel/braswell/spi.c4
-rw-r--r--src/soc/intel/broadwell/spi.c2
-rw-r--r--src/soc/intel/common/mrc_cache.c19
4 files changed, 2 insertions, 25 deletions
diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c
index b1fc692c24..380b23f832 100644
--- a/src/soc/intel/baytrail/spi.c
+++ b/src/soc/intel/baytrail/spi.c
@@ -316,14 +316,12 @@ void spi_init(void)
ich_set_bbar(0);
}
-#ifndef __SMM__
static void spi_init_cb(void *unused)
{
spi_init();
}
BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL);
-#endif
int spi_claim_bus(struct spi_slave *slave)
{
diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c
index afc288a36a..453a719654 100644
--- a/src/soc/intel/braswell/spi.c
+++ b/src/soc/intel/braswell/spi.c
@@ -295,8 +295,6 @@ void spi_init(void)
cntlr.preop = &ich9_spi->preop;
}
-#if ENV_RAMSTAGE
-
static void spi_init_cb(void *unused)
{
spi_init();
@@ -304,8 +302,6 @@ static void spi_init_cb(void *unused)
BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL);
-#endif /* ENV_RAMSTAGE */
-
int spi_claim_bus(struct spi_slave *slave)
{
/* Handled by ICH automatically. */
diff --git a/src/soc/intel/broadwell/spi.c b/src/soc/intel/broadwell/spi.c
index a75ee83ab5..c159e20a44 100644
--- a/src/soc/intel/broadwell/spi.c
+++ b/src/soc/intel/broadwell/spi.c
@@ -312,14 +312,12 @@ void spi_init(void)
pci_write_config_byte(dev, 0xdc, bios_cntl | 0x1);
}
-#if ENV_RAMSTAGE
static void spi_init_cb(void *unused)
{
spi_init();
}
BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL);
-#endif
int spi_claim_bus(struct spi_slave *slave)
{
diff --git a/src/soc/intel/common/mrc_cache.c b/src/soc/intel/common/mrc_cache.c
index 9a066d533f..e5e6b6a142 100644
--- a/src/soc/intel/common/mrc_cache.c
+++ b/src/soc/intel/common/mrc_cache.c
@@ -18,11 +18,13 @@
*/
#include <string.h>
+#include <bootstate.h>
#include <console/console.h>
#include <cbmem.h>
#include <fmap.h>
#include <ip_checksum.h>
#include "mrc_cache.h"
+#include "nvm.h"
#define MRC_DATA_ALIGN 0x1000
#define MRC_DATA_SIGNATURE (('M'<<0)|('R'<<8)|('C'<<16)|('D'<<24))
@@ -154,12 +156,6 @@ int mrc_cache_get_current(const struct mrc_saved_data **cache)
return __mrc_cache_get_current(&region, cache);
}
-#if ENV_ROMSTAGE
-
-/*
- * romstage code
- */
-
/* Fill in mrc_saved_data structure with payload. */
static void mrc_cache_fill(struct mrc_saved_data *cache, void *data,
size_t size)
@@ -197,15 +193,6 @@ int mrc_cache_stash_data(void *data, size_t size)
return 0;
}
-#else
-
-/*
- * ramstage code
- */
-
-#include <bootstate.h>
-#include "nvm.h"
-
static int mrc_slot_valid(const struct mrc_data_region *region,
const struct mrc_saved_data *slot,
const struct mrc_saved_data *to_save)
@@ -330,5 +317,3 @@ static void update_mrc_cache(void *unused)
}
BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL);
-
-#endif /* ENV_ROMSTAGE */