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| author | Nico Huber <nico.huber@secunet.com> | 2017-08-17 16:08:00 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2017-08-21 14:20:25 +0000 |
| commit | 6278867065e0849ba54ed7022fc9aab819daaaaf (patch) | |
| tree | cab62f8a58a8f7d9d1ae5c95cc2ecc1b5abd8fb0 /src/soc | |
| parent | 3f09b0ffef990286ecca344cf73023b35be42406 (diff) | |
| download | coreboot-6278867065e0849ba54ed7022fc9aab819daaaaf.tar.xz | |
soc/intel/common/smbus: Don't clear random bits
FSP might have done some settings for us there. Use pci_update_config32()
since the register is documented to be 32 bits wide.
Change-Id: I995e8a731a6958f10600174d031bb94f5a0a66db
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/21072
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/common/block/smbus/smbus.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c index 8ee38eeeb4..e526bafc79 100644 --- a/src/soc/intel/common/block/smbus/smbus.c +++ b/src/soc/intel/common/block/smbus/smbus.c @@ -53,12 +53,10 @@ static struct smbus_bus_operations lops_smbus_bus = { static void pch_smbus_init(device_t dev) { struct resource *res; - u16 reg16; /* Enable clock gating */ - reg16 = pci_read_config32(dev, 0x80); - reg16 &= ~((1 << 8)|(1 << 10)|(1 << 12)|(1 << 14)); - pci_write_config32(dev, 0x80, reg16); + pci_update_config32(dev, 0x80, + ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)), 0); /* Set Receive Slave Address */ res = find_resource(dev, PCI_BASE_ADDRESS_4); |