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authorAaron Durbin <adurbin@chromium.org>2015-04-02 14:39:25 -0500
committerAaron Durbin <adurbin@google.com>2015-04-02 23:24:45 +0200
commit77a9ebd67bf0447e2c5db169d88ea1e98ea13e8b (patch)
tree04afd09cfc410cdf11fd69d22de0824a24b00f95 /src/soc
parent512bfbc1c7d7fbee8d3e394c4ce8a9e440adbc9a (diff)
downloadcoreboot-77a9ebd67bf0447e2c5db169d88ea1e98ea13e8b.tar.xz
rk3288: remove duplicated #define `PERI_ACLK_DIV_SHIFT`
I'm not sure how the build didn't fail before. In either case remove the duplication. Change-Id: I764774f2b8a5839512af3f054b844a1a86efdb45 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9244 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/rockchip/rk3288/clock.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/rockchip/rk3288/clock.c b/src/soc/rockchip/rk3288/clock.c
index 59a32db5b2..8202ef2127 100644
--- a/src/soc/rockchip/rk3288/clock.c
+++ b/src/soc/rockchip/rk3288/clock.c
@@ -159,7 +159,6 @@ static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 2, 4);
*/
#define PERI_ACLK_DIV_SHIFT (0x0)
#define PERI_ACLK_DIV_MSK (0x1F)
-#define PERI_ACLK_DIV_SHIFT (0)
/*******************CLKSEL37 BITS***************************/
#define L2_DIV_MSK (0x7)