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authorJulius Werner <jwerner@chromium.org>2017-07-17 17:47:31 -0700
committerJulius Werner <jwerner@chromium.org>2017-07-18 23:24:01 +0000
commit959cab4f1fd10901e64f2865fde240689201587c (patch)
tree9c1b0811d0d2443faa169ccfa7e6f94d879a9577 /src/soc
parentff48b3b1ece1de71926a8f36ac71c1dddbc36b59 (diff)
downloadcoreboot-959cab4f1fd10901e64f2865fde240689201587c.tar.xz
vboot: Remove get_sw_write_protect_state callback
We've just decided to remove the only known use of the VBSD_SW_WP flag in vboot (https://chromium-review.googlesource.com/c/575389), since it was unused and never reliable on all platforms anyway. Therefore, we can now also remove the coreboot infrastructure that supported it. It doesn't really hurt anyone, but removing it saves a small bit of effort for future platforms. Change-Id: I6706eba2761a73482e03f3bf46343cf1d84f154b Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/20628 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/apollolake/romstage.c13
-rw-r--r--src/soc/intel/baytrail/romstage/romstage.c7
-rw-r--r--src/soc/intel/broadwell/romstage/romstage.c7
-rw-r--r--src/soc/intel/skylake/romstage/romstage.c8
4 files changed, 0 insertions, 35 deletions
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 24e00df3fd..7c9268af14 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -384,16 +384,3 @@ void mainboard_save_dimm_info(void)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
-
-int get_sw_write_protect_state(void)
-{
- uint8_t status;
- const struct spi_flash *flash;
-
- flash = boot_device_spi_flash();
- if (!flash)
- return 0;
-
- /* Return unprotected status if status read fails. */
- return spi_flash_status(flash, &status) ? 0 : !!(status & 0x80);
-}
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index b6bc64c583..c163257ec0 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -326,10 +326,3 @@ static void *setup_stack_and_mttrs(void)
return slot;
}
-
-int get_sw_write_protect_state(void)
-{
- u8 status;
- /* Return unprotected status if status read fails. */
- return (early_spi_read_wpsr(&status) ? 0 : !!(status & 0x80));
-}
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index b5e52292a4..1417b802cf 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -123,11 +123,4 @@ asmlinkage void romstage_after_car(void)
;
}
-int get_sw_write_protect_state(void)
-{
- u8 status;
- /* Return unprotected status if status read fails. */
- return early_spi_read_wpsr(&status) ? 0 : !!(status & 0x80);
-}
-
void __attribute__((weak)) mainboard_pre_console_init(void) {}
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index cb704fd635..50c050ef45 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -53,14 +53,6 @@ void soc_pre_ram_init(struct romstage_params *params)
soc_fill_pei_data(params->pei_data);
}
-int get_sw_write_protect_state(void)
-{
- u8 status;
-
- /* Return unprotected status if status read fails. */
- return fast_spi_flash_read_wpsr(&status) ? 0 : !!(status & 0x80);
-}
-
/* UPD parameters to be initialized before MemoryInit */
void soc_memory_init_params(struct romstage_params *params,
MEMORY_INIT_UPD *upd)