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authorLin Huang <hl@rock-chips.com>2016-07-25 10:06:09 +0800
committerMartin Roth <martinroth@google.com>2016-08-19 18:56:52 +0200
commitba2b63a20abf3e5955cce43128911f90609beac1 (patch)
treeaca655b3be6d6ceb3040b6e29c35bf81950aa927 /src/soc
parentb18a6665df2633193b7863e3dd9eca230536405b (diff)
downloadcoreboot-ba2b63a20abf3e5955cce43128911f90609beac1.tar.xz
rockchip/rk3399 & gru/kevin: support sdram 933MHz on kevin
We should be running faster. Faster = better. BRANCH=None BUG=chrome-os-partner:54873 TEST=Boot; stressapptest -M 1028 -s 10000 Change-Id: I7f855960af3142efb71cf9c15edd1da66084e9d8 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 51bfd2abb1aba839bd0b5b85e9e918f3cc4fd94d Original-Change-Id: Iec9343763c1a5a5344959b6e8c4dee8079cf8a20 Original-Signed-off-by: Lin Huang <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/362822 Original-Reviewed-by: Douglas Anderson <dianders@chromium.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/16241 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/rockchip/rk3399/clock.c4
-rw-r--r--src/soc/rockchip/rk3399/sdram.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/rockchip/rk3399/clock.c b/src/soc/rockchip/rk3399/clock.c
index cfe363c681..ed9afda3ca 100644
--- a/src/soc/rockchip/rk3399/clock.c
+++ b/src/soc/rockchip/rk3399/clock.c
@@ -556,9 +556,9 @@ void rkclk_configure_ddr(unsigned int hz)
dpll_cfg = (struct pll_div)
{.refdiv = 1, .fbdiv = 100, .postdiv1 = 3, .postdiv2 = 1};
break;
- case 928*MHz:
+ case 933*MHz:
dpll_cfg = (struct pll_div)
- {.refdiv = 1, .fbdiv = 116, .postdiv1 = 3, .postdiv2 = 1};
+ {.refdiv = 3, .fbdiv = 350, .postdiv1 = 3, .postdiv2 = 1};
break;
default:
die("Unsupported SDRAM frequency, add to clock.c!");
diff --git a/src/soc/rockchip/rk3399/sdram.c b/src/soc/rockchip/rk3399/sdram.c
index 9587696992..9aa2952f94 100644
--- a/src/soc/rockchip/rk3399/sdram.c
+++ b/src/soc/rockchip/rk3399/sdram.c
@@ -992,7 +992,7 @@ void sdram_init(const struct rk3399_sdram_params *sdram_params)
printk(BIOS_INFO, "Starting SDRAM initialization...\n");
if ((dramtype == DDR3 && ddr_freq > 800*MHz) ||
- (dramtype == LPDDR3 && ddr_freq > 928*MHz) ||
+ (dramtype == LPDDR3 && ddr_freq > 933*MHz) ||
(dramtype == LPDDR4 && ddr_freq > 800*MHz))
die("SDRAM frequency is to high!");