diff options
author | Julius Werner <jwerner@chromium.org> | 2017-04-14 15:39:23 -0700 |
---|---|---|
committer | Julius Werner <jwerner@chromium.org> | 2017-05-30 22:18:26 +0200 |
commit | c25b2a18fa42f26a799c55c5e463ecb5f4e4c89e (patch) | |
tree | 2b90f696a57935642e3acd86dcdb92f9c23b595a /src/soc | |
parent | baa3e70084bac00885667b20efde3e69901cda70 (diff) | |
download | coreboot-c25b2a18fa42f26a799c55c5e463ecb5f4e4c89e.tar.xz |
tegra210: Remove fake cpu_reset()
The Tegra210 SoC never had a proper cpu_reset() implementation, so it's
pointless to pretend there is one. Most ARM SoCs/boards only define
hard_reset() at the moment anyway, so let's stick with that.
Change-Id: I40f39921fa99d6dfabf818e7abe7a5732341cf4f
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/19786
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/nvidia/tegra210/Makefile.inc | 3 | ||||
-rw-r--r-- | src/soc/nvidia/tegra210/reset.c | 25 |
2 files changed, 0 insertions, 28 deletions
diff --git a/src/soc/nvidia/tegra210/Makefile.inc b/src/soc/nvidia/tegra210/Makefile.inc index 756d4137e6..a2b50c96c2 100644 --- a/src/soc/nvidia/tegra210/Makefile.inc +++ b/src/soc/nvidia/tegra210/Makefile.inc @@ -12,7 +12,6 @@ bootblock-y += monotonic_timer.c bootblock-y += padconfig.c bootblock-y += power.c bootblock-y += funitcfg.c -bootblock-y += reset.c bootblock-y += ../tegra/gpio.c bootblock-y += ../tegra/i2c.c bootblock-y += ../tegra/pingroup.c @@ -41,7 +40,6 @@ romstage-y += cbmem.c romstage-y += ccplex.c romstage-y += clock.c romstage-y += cpu.c -romstage-y += reset.c romstage-y += spi.c romstage-y += i2c.c romstage-y += dma.c @@ -87,7 +85,6 @@ ramstage-y += gic.c ramstage-y += monotonic_timer.c ramstage-y += padconfig.c ramstage-y += funitcfg.c -ramstage-y += reset.c ramstage-y += ram_code.c ramstage-y += ../tegra/apbmisc.c ramstage-y += ../tegra/gpio.c diff --git a/src/soc/nvidia/tegra210/reset.c b/src/soc/nvidia/tegra210/reset.c deleted file mode 100644 index 38a97d82cb..0000000000 --- a/src/soc/nvidia/tegra210/reset.c +++ /dev/null @@ -1,25 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <reset.h> - -/* - * Promote cpu_reset() to a hard_reset(). A shallower reset can be added, - * if needed, at a later time. - */ -void cpu_reset(void) -{ - hard_reset(); -} |