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authorJacob Garber <jgarber1@ualberta.ca>2019-07-12 11:28:00 -0600
committerMartin Roth <martinroth@google.com>2019-07-13 18:38:36 +0000
commitd9642c3a64c9206df703609e392104fafeb8d258 (patch)
treeaeee3fba8fe9b8480b715b0ef12de8ceb6887e8e /src/soc
parente99c1985d587a8983917baf4c9a0609178eca109 (diff)
downloadcoreboot-d9642c3a64c9206df703609e392104fafeb8d258.tar.xz
soc/nvidia/tegra124: Prevent implicit fallthrough
SOR_LINK_SPEED_G5_4 is unsupported, but it is not invalid, so it suffices to return here instead of printing the next warning message. Change-Id: Ifca3c52635e9a39af42e6616821d1099c43c237c Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Found-by: Coverity CID 1293137 Reviewed-on: https://review.coreboot.org/c/coreboot/+/34293 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/nvidia/tegra124/sor.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra124/sor.c b/src/soc/nvidia/tegra124/sor.c
index 9188f83abd..3bc50e813e 100644
--- a/src/soc/nvidia/tegra124/sor.c
+++ b/src/soc/nvidia/tegra124/sor.c
@@ -844,6 +844,7 @@ void tegra_dc_sor_set_voltage_swing(struct tegra_dc_sor_data *sor)
break;
case SOR_LINK_SPEED_G5_4:
printk(BIOS_WARNING, "T124 does not support 5.4G link clock.\n");
+ return;
default:
printk(BIOS_WARNING, "Invalid sor link bandwidth: %d\n",
sor->link_cfg->link_bw);