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authorSubrata Banik <subrata.banik@intel.com>2019-07-05 16:00:38 +0530
committerSubrata Banik <subrata.banik@intel.com>2019-07-09 10:52:19 +0000
commitdf29d23ee3f36d3d6a5fa0fde46beeb67554a8da (patch)
tree93719f2cbd5fc31cbe613ba67fc703d66899e81a /src/soc
parent45564050ec00b6d4b2c5b27cf26a56b46db8df1c (diff)
downloadcoreboot-df29d23ee3f36d3d6a5fa0fde46beeb67554a8da.tar.xz
soc/intel/icelake: Refer to soc/soc_chip.h rather than chip.h
Change-Id: I9e3b5126173e7cec8f2809a38b92c82c9ed5327d Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34085 Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Lean Sheng Tan <lean.sheng.tan@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/icelake/acpi.c3
-rw-r--r--src/soc/intel/icelake/chip.c3
-rw-r--r--src/soc/intel/icelake/cpu.c3
-rw-r--r--src/soc/intel/icelake/espi.c3
-rw-r--r--src/soc/intel/icelake/finalize.c3
-rw-r--r--src/soc/intel/icelake/fsp_params.c2
-rw-r--r--src/soc/intel/icelake/include/soc/ramstage.h3
-rw-r--r--src/soc/intel/icelake/memmap.c3
-rw-r--r--src/soc/intel/icelake/pmc.c3
-rw-r--r--src/soc/intel/icelake/pmutil.c3
-rw-r--r--src/soc/intel/icelake/romstage/fsp_params.c2
-rw-r--r--src/soc/intel/icelake/romstage/romstage.c3
-rw-r--r--src/soc/intel/icelake/sd.c2
-rw-r--r--src/soc/intel/icelake/smihandler.c3
-rw-r--r--src/soc/intel/icelake/smmrelocate.c2
15 files changed, 15 insertions, 26 deletions
diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c
index 3a46c930ab..ae7b344df0 100644
--- a/src/soc/intel/icelake/acpi.c
+++ b/src/soc/intel/icelake/acpi.c
@@ -27,12 +27,11 @@
#include <soc/nvs.h>
#include <soc/pci_devs.h>
#include <soc/pm.h>
+#include <soc/soc_chip.h>
#include <string.h>
#include <vendorcode/google/chromeos/gnvs.h>
#include <wrdd.h>
-#include "chip.h"
-
/*
* List of supported C-states in this processor.
*/
diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c
index eff1c7a17c..ceef266c06 100644
--- a/src/soc/intel/icelake/chip.c
+++ b/src/soc/intel/icelake/chip.c
@@ -26,8 +26,7 @@
#include <soc/itss.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
-
-#include "chip.h"
+#include <soc/soc_chip.h>
#if CONFIG(HAVE_ACPI_TABLES)
const char *soc_acpi_name(const struct device *dev)
diff --git a/src/soc/intel/icelake/cpu.c b/src/soc/intel/icelake/cpu.c
index 527b989e1a..67d41d79fd 100644
--- a/src/soc/intel/icelake/cpu.c
+++ b/src/soc/intel/icelake/cpu.c
@@ -31,8 +31,7 @@
#include <soc/pci_devs.h>
#include <soc/pm.h>
#include <soc/smm.h>
-
-#include "chip.h"
+#include <soc/soc_chip.h>
static void soc_fsp_load(void)
{
diff --git a/src/soc/intel/icelake/espi.c b/src/soc/intel/icelake/espi.c
index 8ab909d861..a4b6d80aa9 100644
--- a/src/soc/intel/icelake/espi.c
+++ b/src/soc/intel/icelake/espi.c
@@ -29,8 +29,7 @@
#include <soc/irq.h>
#include <soc/pci_devs.h>
#include <soc/pcr_ids.h>
-
-#include "chip.h"
+#include <soc/soc_chip.h>
/*
* As per the BWG, Chapter 5.9.1. "PCH BIOS component will reserve
diff --git a/src/soc/intel/icelake/finalize.c b/src/soc/intel/icelake/finalize.c
index b838c199e7..e035c958df 100644
--- a/src/soc/intel/icelake/finalize.c
+++ b/src/soc/intel/icelake/finalize.c
@@ -30,11 +30,10 @@
#include <soc/pcr_ids.h>
#include <soc/pm.h>
#include <soc/smbus.h>
+#include <soc/soc_chip.h>
#include <soc/systemagent.h>
#include <stdlib.h>
-#include "chip.h"
-
#define CAMERA1_CLK 0x8000 /* Camera 1 Clock */
#define CAMERA2_CLK 0x8080 /* Camera 2 Clock */
#define CAM_CLK_EN (1 << 1)
diff --git a/src/soc/intel/icelake/fsp_params.c b/src/soc/intel/icelake/fsp_params.c
index ac7edd2dbb..8b65a89731 100644
--- a/src/soc/intel/icelake/fsp_params.c
+++ b/src/soc/intel/icelake/fsp_params.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <chip.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@@ -23,6 +22,7 @@
#include <soc/intel/common/vbt.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
+#include <soc/soc_chip.h>
#include <string.h>
#include <intelblocks/mp_init.h>
#include <fsp/ppi/mp_service_ppi.h>
diff --git a/src/soc/intel/icelake/include/soc/ramstage.h b/src/soc/intel/icelake/include/soc/ramstage.h
index d78380a6dc..606e2ffb8d 100644
--- a/src/soc/intel/icelake/include/soc/ramstage.h
+++ b/src/soc/intel/icelake/include/soc/ramstage.h
@@ -19,8 +19,7 @@
#include <device/device.h>
#include <fsp/api.h>
#include <fsp/util.h>
-
-#include "../../chip.h"
+#include <soc/soc_chip.h>
void mainboard_silicon_init_params(FSP_S_CONFIG *params);
void soc_init_pre_device(void *chip_info);
diff --git a/src/soc/intel/icelake/memmap.c b/src/soc/intel/icelake/memmap.c
index 49af604c75..67f71da28a 100644
--- a/src/soc/intel/icelake/memmap.c
+++ b/src/soc/intel/icelake/memmap.c
@@ -23,11 +23,10 @@
#include <intelblocks/systemagent.h>
#include <soc/pci_devs.h>
#include <soc/smm.h>
+#include <soc/soc_chip.h>
#include <soc/systemagent.h>
#include <stdlib.h>
-#include "chip.h"
-
void smm_region(void **start, size_t *size)
{
*start = (void *)sa_get_tseg_base();
diff --git a/src/soc/intel/icelake/pmc.c b/src/soc/intel/icelake/pmc.c
index 053d7e8e46..d98c83ecdb 100644
--- a/src/soc/intel/icelake/pmc.c
+++ b/src/soc/intel/icelake/pmc.c
@@ -23,8 +23,7 @@
#include <intelblocks/rtc.h>
#include <soc/pci_devs.h>
#include <soc/pm.h>
-
-#include "chip.h"
+#include <soc/soc_chip.h>
/*
* Set which power state system will be after reapplying
diff --git a/src/soc/intel/icelake/pmutil.c b/src/soc/intel/icelake/pmutil.c
index 0edec4bb1d..45f2a70d7c 100644
--- a/src/soc/intel/icelake/pmutil.c
+++ b/src/soc/intel/icelake/pmutil.c
@@ -37,10 +37,9 @@
#include <soc/pci_devs.h>
#include <soc/pm.h>
#include <soc/smbus.h>
+#include <soc/soc_chip.h>
#include <security/vboot/vbnv.h>
-#include "chip.h"
-
/*
* SMI
*/
diff --git a/src/soc/intel/icelake/romstage/fsp_params.c b/src/soc/intel/icelake/romstage/fsp_params.c
index fa6f9392a4..420c427e7a 100644
--- a/src/soc/intel/icelake/romstage/fsp_params.c
+++ b/src/soc/intel/icelake/romstage/fsp_params.c
@@ -14,12 +14,12 @@
*/
#include <assert.h>
-#include <chip.h>
#include <console/console.h>
#include <fsp/util.h>
#include <soc/iomap.h>
#include <soc/pci_devs.h>
#include <soc/romstage.h>
+#include <soc/soc_chip.h>
static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
const struct soc_intel_icelake_config *config)
diff --git a/src/soc/intel/icelake/romstage/romstage.c b/src/soc/intel/icelake/romstage/romstage.c
index 514e5e8925..65e65cc80e 100644
--- a/src/soc/intel/icelake/romstage/romstage.c
+++ b/src/soc/intel/icelake/romstage/romstage.c
@@ -27,11 +27,10 @@
#include <soc/pci_devs.h>
#include <soc/pm.h>
#include <soc/romstage.h>
+#include <soc/soc_chip.h>
#include <string.h>
#include <timestamp.h>
-#include "../chip.h"
-
#define FSP_SMBIOS_MEMORY_INFO_GUID \
{ \
0xd4, 0x71, 0x20, 0x9b, 0x54, 0xb0, 0x0c, 0x4e, \
diff --git a/src/soc/intel/icelake/sd.c b/src/soc/intel/icelake/sd.c
index 19c3bca459..4d84bb43ff 100644
--- a/src/soc/intel/icelake/sd.c
+++ b/src/soc/intel/icelake/sd.c
@@ -14,7 +14,7 @@
*/
#include <intelblocks/sd.h>
-#include "chip.h"
+#include <soc/soc_chip.h>
int sd_fill_soc_gpio_info(struct acpi_gpio *gpio, struct device *dev)
{
diff --git a/src/soc/intel/icelake/smihandler.c b/src/soc/intel/icelake/smihandler.c
index a7ea0948ea..3d41ee034d 100644
--- a/src/soc/intel/icelake/smihandler.c
+++ b/src/soc/intel/icelake/smihandler.c
@@ -23,8 +23,7 @@
#include <soc/pci_devs.h>
#include <soc/pcr_ids.h>
#include <soc/pm.h>
-
-#include "chip.h"
+#include <soc/soc_chip.h>
#define CSME0_FBE 0xf
#define CSME0_BAR 0x0
diff --git a/src/soc/intel/icelake/smmrelocate.c b/src/soc/intel/icelake/smmrelocate.c
index 05871e4f23..4e2d6840bb 100644
--- a/src/soc/intel/icelake/smmrelocate.c
+++ b/src/soc/intel/icelake/smmrelocate.c
@@ -31,8 +31,8 @@
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/smm.h>
+#include <soc/soc_chip.h>
#include <soc/systemagent.h>
-#include "chip.h"
/* This gets filled in and used during relocation. */
static struct smm_relocation_params smm_reloc_params;