summaryrefslogtreecommitdiff
path: root/src/soc
diff options
context:
space:
mode:
authorFurquan Shaikh <furquan@google.com>2014-08-15 15:26:01 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-03-26 00:27:53 +0100
commiteb5e5882596d52963f1e897dcfc5829958517152 (patch)
tree3471da52cad587e00cc026378590f8910a22b929 /src/soc
parentf270eb9775dc44722063af5cbfaa3a927db6e19e (diff)
downloadcoreboot-eb5e5882596d52963f1e897dcfc5829958517152.tar.xz
tegra132: Initialize CNTFRQ
BUG=chrome-os-partner:31356 BRANCH=None TEST=Kernel boots with the changes required in depthcharge Change-Id: I061305e0ab8f6145c0dc74b2ff958a667ff7276a Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 0ff2fc86c1c6e6b592fa3faffd360a3a8c6351a9 Original-Change-Id: If1c5850607174ab0f485ef41d47016056d9832cd Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/212730 Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8941 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/nvidia/tegra132/soc.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/soc.c b/src/soc/nvidia/tegra132/soc.c
index 84b05078f2..519ba37684 100644
--- a/src/soc/nvidia/tegra132/soc.c
+++ b/src/soc/nvidia/tegra132/soc.c
@@ -23,6 +23,7 @@
#include <arch/io.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/addressmap.h>
+#include <soc/clock.h>
#include <soc/nvidia/tegra/apbmisc.h>
static void soc_read_resources(device_t dev)
@@ -61,6 +62,7 @@ static void soc_read_resources(device_t dev)
static void soc_init(device_t dev)
{
printk(BIOS_INFO, "CPU: Tegra132\n");
+ clock_init_arm_generic_timer();
}
static void soc_noop(device_t dev)