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authorAaron Durbin <adurbin@chromium.org>2017-06-08 10:54:59 -0500
committerAaron Durbin <adurbin@chromium.org>2017-06-09 18:28:30 +0200
commitefc92a86c2826f6fbac8c9c6098eb114c75bf9dd (patch)
treefce1c0dd54442cb64048102db8ed2cd77b733bda /src/soc
parent0b34fc6f54074673099e267a0806c656afd68172 (diff)
downloadcoreboot-efc92a86c2826f6fbac8c9c6098eb114c75bf9dd.tar.xz
soc/intel/apollolake: use fast_spi_cache_bios_region()
The fast_spi_cache_bios_region() does the necessary lookup of BIOS region size, etc. Don't inline the calculation and just defer to the common piece of code for memory-mapped spi flash boot. Change-Id: I6c390aa5a57244308016cd59679d8c3ab02031b8 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/20116 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Barnali Sarkar <barnali.sarkar@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/apollolake/cpu.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c
index ff300bcc90..9e951aa57d 100644
--- a/src/soc/intel/apollolake/cpu.c
+++ b/src/soc/intel/apollolake/cpu.c
@@ -25,6 +25,7 @@
#include <cpu/x86/mtrr.h>
#include <device/device.h>
#include <device/pci.h>
+#include <intelblocks/fast_spi.h>
#include <reg_script.h>
#include <soc/cpu.h>
#include <soc/iomap.h>
@@ -205,7 +206,7 @@ void apollolake_init_cpus(device_t dev)
printk(BIOS_ERR, "MP initialization failure.\n");
/* Temporarily cache the memory-mapped boot media. */
- if (IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED))
- mtrr_use_temp_range(-CONFIG_ROM_SIZE, CONFIG_ROM_SIZE,
- MTRR_TYPE_WRPROT);
+ if (IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED) &&
+ IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH))
+ fast_spi_cache_bios_region();
}