diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2013-12-09 15:03:34 -0800 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-09 05:41:40 +0200 |
| commit | 16cc9c9599262828407146129485590d90600ad7 (patch) | |
| tree | 80cb8162ab47119e94f7887ae5687722f423685a /src/soc | |
| parent | 7538937d6e7c474dc7c17a1bc3c3591f0e6ef311 (diff) | |
| download | coreboot-16cc9c9599262828407146129485590d90600ad7.tar.xz | |
baytrail: fix nvs offsets
The VDAT data was off by 2 bytes when reading it from the
kernel. The reason is that the header did not line up
correctly with actual ACPI code.
BUG=chrome-os-partner:24440
BRANCH=None
TEST=crossystem devsw_cur now returns either 0 or 1 depending
on state.
Change-Id: Ie78599f29cd5daf7da98db5e37fa276d24339f6a
Signed-off-by: Aaron durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179372
Reviewed-on: http://review.coreboot.org/4996
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/baytrail/baytrail/nvs.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/baytrail/baytrail/nvs.h b/src/soc/intel/baytrail/baytrail/nvs.h index aed0974541..97b5fc506e 100644 --- a/src/soc/intel/baytrail/baytrail/nvs.h +++ b/src/soc/intel/baytrail/baytrail/nvs.h @@ -50,12 +50,12 @@ typedef struct { u32 cmem; /* 0x30 - CBMEM TOC */ u32 tolm; /* 0x34 - Top of Low Memory */ u32 cbmc; /* 0x38 - coreboot memconsole */ - u8 rsvd5[39]; + u8 rsvd5[36]; /* Serial IO device BARs */ u32 s0b[8]; /* 0x60 - 0x7f - BAR0 */ u32 s1b[8]; /* 0x80 - 0x9f - BAR1 */ - u8 rsvd6[95]; + u8 rsvd6[96]; /* ChromeOS specific (starts at 0x100)*/ chromeos_acpi_t chromeos; |