diff options
| author | robbie zhang <robbie.zhang@intel.com> | 2015-08-21 09:39:55 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-08-29 07:25:04 +0000 |
| commit | 1f79be1f52bafde0caf87127dd2ab648aa07b7cd (patch) | |
| tree | 56b246fa1a97557e04ee0cb4408f09d8fcf06988 /src/soc | |
| parent | 7a2defb2ddc0e2872f00bfcdc7c383ed89a55097 (diff) | |
| download | coreboot-1f79be1f52bafde0caf87127dd2ab648aa07b7cd.tar.xz | |
intel/skylake: gpio macro adding - gpio output with term and 20k pd
This is also required for kunimitsu fab3 gpio settings.
BUG=None
BRANCH=None
TEST=Built and booted kunimitsu.
Change-Id: I61d71fe4576cd57d17f21aecb188cd5b7fdecca0
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: f65c2618a47c71aad277fb2a11b17ade0a97e5f8
Original-Change-Id: Iebf272b5cc3e67ec35259f5b3e9041ab4cdaa207
Original-Signed-off-by: Robbie Zhang <robbie.zhang@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/294757
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11424
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/skylake/include/soc/gpio.h | 10 | ||||
| -rw-r--r-- | src/soc/intel/skylake/include/soc/gpio_defs.h | 1 |
2 files changed, 8 insertions, 3 deletions
diff --git a/src/soc/intel/skylake/include/soc/gpio.h b/src/soc/intel/skylake/include/soc/gpio.h index 4871c8c024..56fd52e091 100644 --- a/src/soc/intel/skylake/include/soc/gpio.h +++ b/src/soc/intel/skylake/include/soc/gpio.h @@ -113,12 +113,16 @@ void gpio_configure_pads(const struct pad_config *cfgs, size_t num); _PAD_CFG(pad_, term_, \ _DW0_VALS(rst_, RAW, NO, LEVEL, NO, NO, NO, NO, NO, NO, func_, NO, NO)) -/* General purpose output. By default no termination. */ -#define PAD_CFG_GPO(pad_, val_, rst_) \ - _PAD_CFG(pad_, NONE, \ +/* General purpose output with termination. */ +#define PAD_CFG_TERM_GPO(pad_, val_, term_, rst_) \ + _PAD_CFG(pad_, term_, \ _DW0_VALS(rst_, RAW, NO, LEVEL, NO, NO, NO, NO, NO, NO, GPIO, YES, NO) \ | PAD_FIELD_VAL(GPIOTXSTATE, val_)) +/* General purpose output. By default no termination. */ +#define PAD_CFG_GPO(pad_, val_, rst_) \ + PAD_CFG_TERM_GPO(pad_, val_, NONE, rst_) + /* General purpose input with no special IRQ routing. */ #define PAD_CFG_GPI(pad_, term_, rst_) \ _PAD_CFG_ATTRS(pad_, term_, \ diff --git a/src/soc/intel/skylake/include/soc/gpio_defs.h b/src/soc/intel/skylake/include/soc/gpio_defs.h index 09f50199f6..8b8a1c09ec 100644 --- a/src/soc/intel/skylake/include/soc/gpio_defs.h +++ b/src/soc/intel/skylake/include/soc/gpio_defs.h @@ -492,6 +492,7 @@ #define PAD_TERM_MASK 0xf #define PAD_TERM_NONE 0 #define PAD_TERM_5K_PD 2 +#define PAD_TERM_20K_PD 4 #define PAD_TERM_1K_PU 9 #define PAD_TERM_2K_PU 11 #define PAD_TERM_5K_PU 10 |