diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-10-23 21:56:17 +0200 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2020-10-30 00:46:04 +0000 |
commit | 37164ff60927ad965915af28f593c491a7623908 (patch) | |
tree | 71801d14d12f5a25a4a9fd0b5fcd24ac7bbd06fc /src/soc | |
parent | c200e8c7cdebed98860a771888efbf998c5912b3 (diff) | |
download | coreboot-37164ff60927ad965915af28f593c491a7623908.tar.xz |
soc/intel/broadwell: Inline CPUID helpers
These functions are small and used in various stages. Inline them.
Change-Id: I0d15012f264dbb0ae2eff8210f79176b350b6e7f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46707
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/intel/broadwell/cpu_info.c | 10 | ||||
-rw-r--r-- | src/soc/intel/broadwell/include/soc/cpu.h | 14 | ||||
-rw-r--r-- | src/soc/intel/broadwell/romstage/cpu.c | 5 |
3 files changed, 12 insertions, 17 deletions
diff --git a/src/soc/intel/broadwell/cpu_info.c b/src/soc/intel/broadwell/cpu_info.c index 506b1a7985..8814a480e5 100644 --- a/src/soc/intel/broadwell/cpu_info.c +++ b/src/soc/intel/broadwell/cpu_info.c @@ -5,16 +5,6 @@ #include <soc/msr.h> #include <soc/systemagent.h> -u32 cpu_family_model(void) -{ - return cpuid_eax(1) & 0x0fff0ff0; -} - -u32 cpu_stepping(void) -{ - return cpuid_eax(1) & 0xf; -} - /* Dynamically determine if the part is ULT. */ int cpu_is_ult(void) { diff --git a/src/soc/intel/broadwell/include/soc/cpu.h b/src/soc/intel/broadwell/include/soc/cpu.h index 02605851ce..b8ef761e38 100644 --- a/src/soc/intel/broadwell/include/soc/cpu.h +++ b/src/soc/intel/broadwell/include/soc/cpu.h @@ -3,7 +3,9 @@ #ifndef _BROADWELL_CPU_H_ #define _BROADWELL_CPU_H_ +#include <arch/cpu.h> #include <device/device.h> +#include <stdint.h> /* CPU types */ #define HASWELL_FAMILY_ULT 0x40650 @@ -42,8 +44,16 @@ void set_power_limits(u8 power_limit_1_time); int cpu_config_tdp_levels(void); /* CPU identification */ -u32 cpu_family_model(void); -u32 cpu_stepping(void); +static inline u32 cpu_family_model(void) +{ + return cpuid_eax(1) & 0x0fff0ff0; +} + +static inline u32 cpu_stepping(void) +{ + return cpuid_eax(1) & 0xf; +} + int cpu_is_ult(void); #endif diff --git a/src/soc/intel/broadwell/romstage/cpu.c b/src/soc/intel/broadwell/romstage/cpu.c index 736487697d..c9f70a85d1 100644 --- a/src/soc/intel/broadwell/romstage/cpu.c +++ b/src/soc/intel/broadwell/romstage/cpu.c @@ -7,11 +7,6 @@ #include <soc/msr.h> #include <soc/romstage.h> -u32 cpu_family_model(void) -{ - return cpuid_eax(1) & 0x0fff0ff0; -} - void set_max_freq(void) { msr_t msr, perf_ctl, platform_info; |