diff options
author | Aaron Durbin <adurbin@chromium.org> | 2015-08-28 02:14:48 -0500 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-09-08 11:22:36 +0000 |
commit | 394d6993b90d73d4fca7b7500b753e1d18452cd7 (patch) | |
tree | 16d84e3afff63520e093f6f1d50dbd8809d2012b /src/soc | |
parent | bdc1c878992076da145b3c1d775f86adaa37ecde (diff) | |
download | coreboot-394d6993b90d73d4fca7b7500b753e1d18452cd7.tar.xz |
skylake: fix eventlog on resume path
The spi_init() routine needs to be called in all boot paths to allow
writes to the SPI part. The reason is that the write enable is done
in spi_init(). Moreover, this is also required for a writing a firmware
update after a resume.
BUG=chrome-os-partner:42115
BRANCH=None
TEST=Built and booted glados. Suspended and resumed. Eventlogs show
up in resume path.
Change-Id: I187baa940bb45ef90ab82e67c02f13d8855d364e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8813ab227395cfcba46ad4109730a1eb5897e538
Original-Change-Id: Ida726fc29e6d49cd9af02c4e57125e09f2599c36
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/295238
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/11541
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/intel/skylake/flash_controller.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/flash_controller.c b/src/soc/intel/skylake/flash_controller.c index 48be9bb9bb..f27bcc5484 100644 --- a/src/soc/intel/skylake/flash_controller.c +++ b/src/soc/intel/skylake/flash_controller.c @@ -454,3 +454,15 @@ static struct spi_flash *spi_flash_hwseq_probe(struct spi_slave *spi) } #endif +#if ENV_RAMSTAGE +/* + * spi_init() needs run unconditionally in every boot (including resume) to + * allow write protect to be disabled for eventlog and firmware updates. + */ +static void spi_init_cb(void *unused) +{ + spi_init(); +} + +BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_EXIT, spi_init_cb, NULL); +#endif |