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authorAndrey Petrov <anpetrov@fb.com>2020-04-30 14:08:19 -0700
committerAndrey Petrov <andrey.petrov@gmail.com>2020-05-01 23:12:12 +0000
commit4e48ac04da0cb4dd71edd039b55e04942b80ab75 (patch)
tree5d1a5625ba3e9cddf19f251541f6a05ae6654ab8 /src/soc
parentcf270f0d62dbe2647a8e4b80d6c986a6922d47f9 (diff)
downloadcoreboot-4e48ac04da0cb4dd71edd039b55e04942b80ab75.tar.xz
soc/intel/xeon_sp/cpx: Implement hide/unhide P2SB traditional dance
Perform the P2SB hide/unhide trick. This is needed so that BAR0 (0xfd000000) is not reclaimed by resource allocator, since it can not deal with a device that does not exist (hidden). Signed-off-by: Andrey Petrov <anpetrov@fb.com> Change-Id: I5db0ae4e31d72ba86efba5728b2afc68d3180d5d Reviewed-on: https://review.coreboot.org/c/coreboot/+/40921 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/xeon_sp/cpx/chip.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c
index 196f3df0d1..0a4cea6207 100644
--- a/src/soc/intel/xeon_sp/cpx/chip.c
+++ b/src/soc/intel/xeon_sp/cpx/chip.c
@@ -7,6 +7,7 @@
#include <cpu/x86/lapic.h>
#include <device/pci.h>
#include <fsp/api.h>
+#include <intelblocks/p2sb.h>
#include <soc/cpu.h>
#include <soc/ramstage.h>
#include <soc/pm.h>
@@ -73,7 +74,7 @@ struct pci_operations soc_pci_ops = {
static void chip_final(void *data)
{
- /* nothing implemented yet */
+ p2sb_hide();
}
static void chip_init(void *data)
@@ -82,6 +83,7 @@ static void chip_init(void *data)
fsp_silicon_init(false);
pch_enable_ioapic(NULL);
setup_lapic();
+ p2sb_unhide();
}
struct chip_operations soc_intel_xeon_sp_cpx_ops = {