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| author | Werner Zeh <werner.zeh@siemens.com> | 2016-09-12 07:48:51 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-09-13 16:52:53 +0200 |
| commit | 4f2754c7201ef09b1619cc8c2ae9399616374214 (patch) | |
| tree | e85b77a2bcb6e11d339e95a75cce05eb83358954 /src/soc | |
| parent | 9d18e330fd2e6a3f9daf31f2111f82af0dd3c78d (diff) | |
| download | coreboot-4f2754c7201ef09b1619cc8c2ae9399616374214.tar.xz | |
fsp_broadwell_de: Add Kconfig switch for SERIRQ operation mode
The serial IRQ (SERIRQ) used by the LPC interface can operate either in
continuous or in quiet mode. Add a Kconfig switch to select the desired
mode. This switch can now be used on mainboard level to enable the
needed mode per mainboard.
Change-Id: Ibe246b88164a622f9c71ebe7bab752a083a49a62
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/16575
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/fsp_broadwell_de/Kconfig | 7 | ||||
| -rw-r--r-- | src/soc/intel/fsp_broadwell_de/include/soc/lpc.h | 4 | ||||
| -rw-r--r-- | src/soc/intel/fsp_broadwell_de/southcluster.c | 9 |
3 files changed, 19 insertions, 1 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig index fc0c76394c..99a2bfd6c2 100644 --- a/src/soc/intel/fsp_broadwell_de/Kconfig +++ b/src/soc/intel/fsp_broadwell_de/Kconfig @@ -81,6 +81,13 @@ config CPU_MICROCODE_HEADER_FILES string default "../intel/cpu/broadwell_de/microcode/M1050663_07000001.h ../intel/cpu/broadwell_de/microcode/M1050662_0000000A.h ../intel/cpu/broadwell_de/microcode/MFF50661_F1000008.h" +config SERIRQ_CONTINUOUS_MODE + bool + default n + help + If you set this option to y, the serial IRQ machine will be + operated in continuous mode. + ## Broadwell-DE Specific FSP Kconfig source src/soc/intel/fsp_broadwell_de/fsp/Kconfig diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h b/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h index 60cdc89f51..8cf8889c3f 100644 --- a/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h +++ b/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h @@ -22,6 +22,10 @@ /* LPC Interface Bridge PCI Configuration Registers */ #define REVID 0x08 #define PIRQ_RCR1 0x60 +#define SIRQ_CNTL 0x64 +#define SIRQ_EN 0x80 +#define SIRQ_MODE_QUIET 0x00 +#define SIRQ_MODE_CONT 0x40 #define PIRQ_RCR2 0x68 #define LPC_IO_DEC 0x80 #define LPC_EN 0x82 diff --git a/src/soc/intel/fsp_broadwell_de/southcluster.c b/src/soc/intel/fsp_broadwell_de/southcluster.c index 7ed889662e..e8c8706a5c 100644 --- a/src/soc/intel/fsp_broadwell_de/southcluster.c +++ b/src/soc/intel/fsp_broadwell_de/southcluster.c @@ -215,7 +215,14 @@ static void sc_init(struct device *dev) PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL); /* Program Serial IRQ register. */ - pci_write_config8(dev, 0x64, 0xd0); + pci_write_config8(dev, SIRQ_CNTL, SIRQ_EN | SIRQ_MODE_CONT); + if (!IS_ENABLED(CONFIG_SERIRQ_CONTINUOUS_MODE)) { + /* If SERIRQ have to operate in quiet mode, it should have been + run in continuous mode for at least one frame first. Use I/O + access to achieve the delay of at least one LPC cycle. */ + outb(inb(0x80), 0x80); + pci_write_config8(dev, SIRQ_CNTL, SIRQ_EN | SIRQ_MODE_QUIET); + } sc_pirq_init(dev); write_pci_config_irqs(); |