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authorAngel Pons <th3fanbus@gmail.com>2020-07-25 11:27:49 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-26 20:54:32 +0000
commita634dab1a66d47023a16eaa1ec0a6f0eec688ef0 (patch)
tree479b6bc5213f3d7477e03a97170de004791917f9 /src/soc
parentd8f44360054b6f63d4cf76be179c4d1193e456ae (diff)
downloadcoreboot-a634dab1a66d47023a16eaa1ec0a6f0eec688ef0.tar.xz
skylake boards: Factor out copy-pasted PIRQ routes
Put them in common code just in case something depends on the values. Change-Id: Ief526efcbd5ba5546572da1bc6bb6d86729f4e54 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43851 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/skylake/chip.h13
-rw-r--r--src/soc/intel/skylake/irq.c25
2 files changed, 12 insertions, 26 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 92cd1bad85..054584051a 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -49,19 +49,6 @@ struct soc_intel_skylake_config {
GPU_BACKLIGHT_POLARITY_LOW,
} gpu_pch_backlight_polarity;
- /*
- * Interrupt Routing configuration
- * If bit7 is 1, the interrupt is disabled.
- */
- uint8_t pirqa_routing;
- uint8_t pirqb_routing;
- uint8_t pirqc_routing;
- uint8_t pirqd_routing;
- uint8_t pirqe_routing;
- uint8_t pirqf_routing;
- uint8_t pirqg_routing;
- uint8_t pirqh_routing;
-
/* Gpio group routed to each dword of the GPE0 block. Values are
* of the form GPP_[A:G] or GPD. */
uint8_t gpe0_dw0; /* GPE0_31_0 STS/EN */
diff --git a/src/soc/intel/skylake/irq.c b/src/soc/intel/skylake/irq.c
index dbc172f66c..129f132643 100644
--- a/src/soc/intel/skylake/irq.c
+++ b/src/soc/intel/skylake/irq.c
@@ -240,18 +240,17 @@ void soc_irq_settings(FSP_SIL_UPD *params)
void soc_pch_pirq_init(const struct device *dev)
{
- const config_t *config = config_of(dev);
uint8_t pch_interrupt_routing[MAX_PXRC_CONFIG];
struct device *irq_dev;
- pch_interrupt_routing[0] = config->pirqa_routing;
- pch_interrupt_routing[1] = config->pirqb_routing;
- pch_interrupt_routing[2] = config->pirqc_routing;
- pch_interrupt_routing[3] = config->pirqd_routing;
- pch_interrupt_routing[4] = config->pirqe_routing;
- pch_interrupt_routing[5] = config->pirqf_routing;
- pch_interrupt_routing[6] = config->pirqg_routing;
- pch_interrupt_routing[7] = config->pirqh_routing;
+ pch_interrupt_routing[0] = PCH_IRQ11;
+ pch_interrupt_routing[1] = PCH_IRQ10;
+ pch_interrupt_routing[2] = PCH_IRQ11;
+ pch_interrupt_routing[3] = PCH_IRQ11;
+ pch_interrupt_routing[4] = PCH_IRQ11;
+ pch_interrupt_routing[5] = PCH_IRQ11;
+ pch_interrupt_routing[6] = PCH_IRQ11;
+ pch_interrupt_routing[7] = PCH_IRQ11;
itss_irq_init(pch_interrupt_routing);
@@ -265,16 +264,16 @@ void soc_pch_pirq_init(const struct device *dev)
switch (int_pin) {
case 1: /* INTA# */
- int_line = config->pirqa_routing;
+ int_line = pch_interrupt_routing[0];
break;
case 2: /* INTB# */
- int_line = config->pirqb_routing;
+ int_line = pch_interrupt_routing[1];
break;
case 3: /* INTC# */
- int_line = config->pirqc_routing;
+ int_line = pch_interrupt_routing[2];
break;
case 4: /* INTD# */
- int_line = config->pirqd_routing;
+ int_line = pch_interrupt_routing[3];
break;
}