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authorJustin TerAvest <teravest@chromium.org>2018-02-28 11:42:38 -0700
committerMartin Roth <martinroth@google.com>2018-03-01 16:05:18 +0000
commitbb75effd87f9f86fa612dcfa1aa7b6156d110f01 (patch)
treecaeed1f06e9a44075b41d2eb1abb76f43add3e87 /src/soc
parenta8c9efe655509a5f7773ab17e191bf1b1b58d3ef (diff)
downloadcoreboot-bb75effd87f9f86fa612dcfa1aa7b6156d110f01.tar.xz
soc/amd/stoneyridge: Remove printk for GPIO
The printk() calls in sb_program_gpios() aren't necessary, and incur a 13 second delay if the function is called from bootblock_mainboard_early_init(). This commit removes them so GPIOs can be set up earlier. TEST=call sb_program_gpios from bootblock_mainboard_early_init BUG=b:73898539 Change-Id: I064291decf47d86132e36469e029b3262ec20172 Signed-off-by: Justin TerAvest <teravest@chromium.org> Reviewed-on: https://review.coreboot.org/24915 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h1
-rw-r--r--src/soc/amd/stoneyridge/southbridge.c2
2 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 3489afc0f9..3011af27f1 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -288,7 +288,6 @@
#else
#define GPIO_TABLE_BOOTBLOCK 0
#endif
-#define STR_GPIO_STAGE ENV_STRING
struct soc_amd_stoneyridge_gpio {
uint8_t gpio;
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 5d7b73d1a6..3d0cc74779 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -161,7 +161,6 @@ void sb_program_gpios(const struct soc_amd_stoneyridge_gpio *gpio_ptr,
void *tmp_ptr;
uint8_t control, mux, index;
- printk(BIOS_SPEW, "GPIO programming stage %s\n", STR_GPIO_STAGE);
for (index = 0; index < size; index++) {
mux = gpio_ptr[index].function;
control = gpio_ptr[index].control;
@@ -176,7 +175,6 @@ void sb_program_gpios(const struct soc_amd_stoneyridge_gpio *gpio_ptr,
AMD_GPIO_CONTROL + 2);
write8(tmp_ptr, control);
}
- printk(BIOS_SPEW, "End GPIO programming\n");
}
/**