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authorVadim Bendebury <vbendeb@chromium.org>2014-12-10 20:11:30 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-15 21:55:50 +0200
commitfa00ae7de6a9605deb5d1d8a930d2b0f4969e082 (patch)
treedc4d9de0cff5fd645c874681d0ea9f708f1a757f /src/soc
parent36417aa7422941f10d6f74b4711b02adcdba088b (diff)
downloadcoreboot-fa00ae7de6a9605deb5d1d8a930d2b0f4969e082.tar.xz
google/storm: prepare enabling vboot2
This change sets up the list of source files for vboot2's verstage without enabling it. BRANCH=storm BUG=chrome-os-partner:34161 TEST=not much testing yet, just successful compilation. Change-Id: I4052c20795459bf0e057c0f0952226ea4a8c89f1 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 48847ab8acfbe4b33d61d3d012c72c025cd8f364 Original-Change-Id: I1d7944e681f8a4b113a90ac028a0faba4423be89 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/234643 Reviewed-on: http://review.coreboot.org/9684 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/qualcomm/ipq806x/Makefile.inc6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc
index 16381a4de1..c0378bcdc9 100644
--- a/src/soc/qualcomm/ipq806x/Makefile.inc
+++ b/src/soc/qualcomm/ipq806x/Makefile.inc
@@ -23,6 +23,12 @@ bootblock-$(CONFIG_SPI_FLASH) += spi.c
bootblock-y += timer.c
bootblock-$(CONFIG_DRIVERS_UART) += uart.c
+verstage-y += clock.c
+verstage-y += gpio.c
+verstage-y += spi.c
+verstage-y += timer.c
+verstage-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart.c
+
romstage-y += clock.c
romstage-y += gpio.c
romstage-$(CONFIG_SPI_FLASH) += spi.c