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author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2018-12-11 17:53:07 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-18 13:24:28 +0000 |
commit | 45e6c82e682fcfa7155f0e0193bf4c666b1d6466 (patch) | |
tree | 271637254114b391f7ed94c536aa15eec9fc0f4c /src/soc | |
parent | 7ccb2821d27624d97e9728629bf675242d4966d8 (diff) | |
download | coreboot-45e6c82e682fcfa7155f0e0193bf4c666b1d6466.tar.xz |
Fix typos involving "the the"
Change-Id: I179264ee6681a7ba4488b9f1c6bce1a19b4e1772
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/30160
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/amd/common/block/include/amdblocks/dimm_spd.h | 2 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/Kconfig | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/dimm_spd.h b/src/soc/amd/common/block/include/amdblocks/dimm_spd.h index 60107c9ba4..1ce6d86fa7 100644 --- a/src/soc/amd/common/block/include/amdblocks/dimm_spd.h +++ b/src/soc/amd/common/block/include/amdblocks/dimm_spd.h @@ -22,7 +22,7 @@ /* * Fill the buf and returns 0 on success. - * Return -1 on failure and the the caller tries sb_read_spd() + * Return -1 on failure and the caller tries sb_read_spd() * to get the SPD from I2C. */ int mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len); diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 6255cfca60..529d651243 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -158,7 +158,7 @@ config STONEYRIDGE_XHCI_ENABLE The XHCI controller must be enabled and the XHCI firmware must be added in order to have USB 3.0 support configured by coreboot. The OS will be responsible for enabling the XHCI - controller if the the XHCI firmware is available but the + controller if the XHCI firmware is available but the XHCI controller is not enabled by coreboot. config STONEYRIDGE_XHCI_FWM |