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| author | Lijian Zhao <lijian.zhao@intel.com> | 2019-07-02 23:22:36 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-06 18:23:05 +0000 |
| commit | 490b1d3b945b125627498cb3d695e4a0be699337 (patch) | |
| tree | d633ab4689d905b7f2cebf7414a879123219cba4 /src/soc | |
| parent | 78025f6c5c8a65d662c3af7d8de2ad5a59752419 (diff) | |
| download | coreboot-490b1d3b945b125627498cb3d695e4a0be699337.tar.xz | |
soc/intel/icelake: Fix outb order
Similar to CB:33940, fix outb orders.
Change-Id: I1d35235abc7e02e6058f07809b738635861cc9e4
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33960
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jeremy Soller <jackpot51@gmail.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/icelake/espi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/icelake/espi.c b/src/soc/intel/icelake/espi.c index 9ca0c7c295..8ab909d861 100644 --- a/src/soc/intel/icelake/espi.c +++ b/src/soc/intel/icelake/espi.c @@ -194,10 +194,10 @@ static void pch_misc_init(void) /* Setup NMI on errors, disable SERR */ reg8 = (inb(0x61)) & 0xf0; - outb(0x61, (reg8 | (1 << 2))); + outb((reg8 | (1 << 2)), 0x61); /* Disable NMI sources */ - outb(0x70, (1 << 7)); + outb((1 << 7), 0x70); }; static void clock_gate_8254(const struct device *dev) |