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| author | Aamir Bohra <aamir.bohra@intel.com> | 2018-06-01 11:06:49 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2018-06-02 04:07:55 +0000 |
| commit | 550fa21776b757207df025cee8f1ffaf9c680793 (patch) | |
| tree | 4e956f8b66692ce25727a2c5b47ee104af1256a5 /src/soc | |
| parent | 64b29990dcf6af87f50ea77cd0cb3d742e5d5b75 (diff) | |
| download | coreboot-550fa21776b757207df025cee8f1ffaf9c680793.tar.xz | |
soc/intel/common: Add edge trigger configuartion for IOAPIC IRQ mode
Change-Id: I4e1f009489f2d8338ae94b78d7e9eb3f88a85daa
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/26730
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/gpio_defs.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h index 244c680158..a8d5ac9eeb 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h @@ -284,6 +284,9 @@ #define PAD_CFG_GPI_APIC_HIGH(pad, pull, rst) \ PAD_CFG_GPI_APIC(pad, pull, rst, LEVEL, NONE) +#define PAD_CFG_GPI_APIC_EDGE_LOW(pad, pull, rst) \ + PAD_CFG_GPI_APIC(pad, pull, rst, EDGE_SINGLE, INVERT) + /* General purpose input, routed to SMI */ #define PAD_CFG_GPI_SMI(pad, pull, rst, trig, inv) \ _PAD_CFG_STRUCT(pad, \ |