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author | Paul Kocialkowski <contact@paulk.fr> | 2016-05-01 18:38:04 +0200 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2016-05-09 07:49:05 +0200 |
commit | 8957dd6b52919ed634aa502dfd5b6316a6e6e055 (patch) | |
tree | d8d0733f1aedee74916c3be6f9a99808cc8cccc8 /src/soc | |
parent | 0dcd41739ffb04f4f1eb3dfe9ab54892a68ba83a (diff) | |
download | coreboot-8957dd6b52919ed634aa502dfd5b6316a6e6e055.tar.xz |
tegra124: Align the framebuffer's bytes-per-line to 32
It turns out that tegra124 needs the framebuffer's bytes-per-line to be
aligned to 32 for proper display. This behaviour was default before
moving to edid_set_framebuffer_bits_per_pixel.
This fixes display on nyan_big.
Change-Id: Ie81b395fca23f3648ea7cd1df51152faea864c9a
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/14564
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/nvidia/tegra124/display.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/nvidia/tegra124/display.c b/src/soc/nvidia/tegra124/display.c index bb96831514..0fc15cbea9 100644 --- a/src/soc/nvidia/tegra124/display.c +++ b/src/soc/nvidia/tegra124/display.c @@ -334,6 +334,6 @@ void display_startup(device_t dev) edid.mode.va = config->yres; edid.mode.ha = config->xres; edid_set_framebuffer_bits_per_pixel(&edid, - config->framebuffer_bits_per_pixel, 0); + config->framebuffer_bits_per_pixel, 64); set_vbe_mode_info_valid(&edid, (uintptr_t)(framebuffer_base_mb*MiB)); } |