soc/intel/cannonlake: Add option to select FSP_CAR

This patch provides an option for non-chrome devices to make use of
FSP-T for performing cache-as-ram initialization. Majority of IOTG users
are using FSP-T for CAR implementation and aren't able to select FSP_CAR
Kconfig from SoC without conflicting with existing CAR config.

TEST=Ensure that both the Chrome platform and non Chrome OS platform
can select either CAR implementation based on Kconfig options
FSP_CAR or CAR_NEM_ENHANCED. By default Chrome platform choose
CAR_NEM_ENHANCED Kconfig and non Chrome platforms choose
FSP_CAR by default.

Change-Id: If565b649fe1c2abdbcf0a740c15db7253c084ae7
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/23161
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2 files changed, 35 insertions, 10 deletions

diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 715cdf4ebb..cfd54beae0 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -24,7 +24,6 @@ config CPU_SPECIFIC_OPTIONS
 	select HAVE_INTEL_FIRMWARE
 	select HAVE_MONOTONIC_TIMER
 	select HAVE_SMI_HANDLER
-	select INTEL_CAR_NEM_ENHANCED
 	select INTEL_GMA_ACPI
 	select INTEL_GMA_ADD_VBT_DATA_FILE if RUN_FSP_GOP
 	select IOAPIC
@@ -43,7 +42,6 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
 	select SOC_INTEL_COMMON_BLOCK
 	select SOC_INTEL_COMMON_BLOCK_ACPI
-	select SOC_INTEL_COMMON_BLOCK_CAR
 	select SOC_INTEL_COMMON_BLOCK_CPU
 	select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
 	select SOC_INTEL_COMMON_BLOCK_CSE
@@ -175,4 +173,31 @@ config STACK_SIZE
 	hex
 	default 0x2000
 
+choice
+	prompt "Cache-as-ram implementation"
+	default USE_CANNONLAKE_CAR_NEM_ENHANCED if MAINBOARD_HAS_CHROMEOS
+	default USE_CANNONLAKE_FSP_CAR
+	help
+	  This option allows you to select how cache-as-ram (CAR) is set up.
+
+config USE_CANNONLAKE_CAR_NEM_ENHANCED
+	bool "Enhanced Non-evict mode"
+	select SOC_INTEL_COMMON_BLOCK_CAR
+	select INTEL_CAR_NEM_ENHANCED
+	help
+	  A current limitation of NEM (Non-Evict mode) is that code and data
+	  sizes are derived from the requirement to not write out any modified
+	  cache line. With NEM, if there is no physical memory behind the
+	  cached area, the modified data will be lost and NEM results will be
+	  inconsistent. ENHANCED NEM guarantees that modified data is always
+	  kept in cache while clean data is replaced.
+
+config USE_CANNONLAKE_FSP_CAR
+	bool "Use FSP CAR"
+	select FSP_CAR
+	help
+	  Use FSP APIs to initialize and tear down the Cache-As-Ram.
+
+endchoice
+
 endif
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 7bb16d20d8..794b8e946f 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -285,27 +285,27 @@ config NHLT_DA7219
 
 choice
 	prompt "Cache-as-ram implementation"
-	default CAR_NEM_ENHANCED
+	default USE_SKYLAKE_CAR_NEM_ENHANCED
 	help
 	  This option allows you to select how cache-as-ram (CAR) is set up.
 
-config CAR_NEM_ENHANCED
+config USE_SKYLAKE_CAR_NEM_ENHANCED
 	bool "Enhanced Non-evict mode"
 	select SOC_INTEL_COMMON_BLOCK_CAR
 	select INTEL_CAR_NEM_ENHANCED
 	help
-	  A current limitation of NEM (Non-Evict mode) is that code and data sizes
-	  are derived from the requirement to not write out any modified cache line.
-	  With NEM, if there is no physical memory behind the cached area,
-	  the modified data will be lost and NEM results will be inconsistent.
-	  ENHANCED NEM guarantees that modified data is always
+	  A current limitation of NEM (Non-Evict mode) is that code and data
+	  sizes are derived from the requirement to not write out any modified
+	  cache line. With NEM, if there is no physical memory behind the
+	  cached area, the modified data will be lost and NEM results will be
+	  inconsistent. ENHANCED NEM guarantees that modified data is always
 	  kept in cache while clean data is replaced.
 
 config USE_SKYLAKE_FSP_CAR
 	bool "Use FSP CAR"
 	select FSP_CAR
 	help
-	  Use FSP APIs to initialize & tear Down the Cache-As-Ram.
+	  Use FSP APIs to initialize and tear down the Cache-As-Ram.
 
 endchoice