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| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2019-08-30 17:10:24 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-09 13:32:54 +0000 |
| commit | a5208f575fa98b8ebcd3e410cd367a682150a77d (patch) | |
| tree | b3d19ab36570a81894590e3e9a3f327b56ee8559 /src/soc | |
| parent | 13e902d5718ef57571ec3c0e4f08c9368b6766cc (diff) | |
| download | coreboot-a5208f575fa98b8ebcd3e410cd367a682150a77d.tar.xz | |
soc/intel/common/block/cse: Add helper function heci_send_receive
Aggregate sending and receiving HECI messages into a single function.
TEST=Verified sending and receiving reply HECI message on CML RVP & Hatch board
Change-Id: Ic95239eef8591d3aadf56a857c97f3f1e12b16ac
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35224
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/common/block/cse/cse.c | 16 | ||||
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cse.h | 8 |
2 files changed, 24 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index 446c5ac4ba..9520242d2e 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -458,6 +458,22 @@ int heci_receive(void *buff, size_t *maxlen) return 0; } +int heci_send_receive(const void *snd_msg, size_t snd_sz, void *rcv_msg, size_t *rcv_sz) +{ + if (!heci_send(snd_msg, snd_sz, BIOS_HOST_ADDR, HECI_MKHI_ADDR)) { + printk(BIOS_ERR, "HECI: send Failed\n"); + return 0; + } + + if (rcv_msg != NULL) { + if (!heci_receive(rcv_msg, rcv_sz)) { + printk(BIOS_ERR, "HECI: receive Failed\n"); + return 0; + } + } + return 1; +} + /* * Attempt to reset the device. This is useful when host and ME are out * of sync during transmission or ME didn't understand the message. diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index d7c4d9f93e..424d483cfa 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -37,6 +37,14 @@ int heci_receive(void *buff, size_t *maxlen); */ int heci_send(const void *msg, size_t len, uint8_t host_addr, uint8_t cse_addr); + +/* + * Sends snd_msg of size snd_sz, and reads message into buffer pointed by + * rcv_msg of size rcv_sz + * Returns 0 on failure a 1 on success. + */ +int heci_send_receive(const void *snd_msg, size_t snd_sz, void *rcv_msg, size_t *rcv_sz); + /* * Attempt device reset. This is useful and perhaps only thing left to do when * CPU and CSE are out of sync or CSE fails to respond. |