diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2017-12-14 16:28:45 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2017-12-21 03:52:59 +0000 |
| commit | c1d99c9962be5c475047ce75014983f5073f8729 (patch) | |
| tree | fda707ba4488faff482b6e5d093612650528bb05 /src/soc | |
| parent | 7f4ec968695e918da49fc9b9163188188b71f05b (diff) | |
| download | coreboot-c1d99c9962be5c475047ce75014983f5073f8729.tar.xz | |
soc/intel/skylake: Move Enable power button SMI code from smi.c to pmc.c
Original commit hash aeb2d64c85ca2c3a77f50d57e3a92f6fc0a5c2d3 (soc/intel/skylake:
Enable power button SMI when jumping to payload)
Change-Id: Ia4fe2694006baf24ed475c85aaffa6a0d2a6031d
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/22868
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/skylake/pmc.c | 16 | ||||
| -rw-r--r-- | src/soc/intel/skylake/smi.c | 15 |
2 files changed, 16 insertions, 15 deletions
diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c index 92d0f9e358..297188bfe4 100644 --- a/src/soc/intel/skylake/pmc.c +++ b/src/soc/intel/skylake/pmc.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include <bootstate.h> #include <chip.h> #include <console/console.h> #include <device/device.h> @@ -204,4 +205,19 @@ void pmc_soc_restore_power_failure(void) pmc_get_mainboard_power_failure_state_choice()); } +static void pm1_enable_pwrbtn_smi(void *unused) +{ + /* + * Enable power button SMI only before jumping to payload. This ensures + * that: + * 1. Power button SMI is enabled only after coreboot is done. + * 2. On resume path, power button SMI is not enabled and thus avoids + * any shutdowns because of power button presses due to power button + * press in resume path. + */ + pmc_update_pm1_enable(PWRBTN_EN); +} + +BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, pm1_enable_pwrbtn_smi, NULL); + #endif diff --git a/src/soc/intel/skylake/smi.c b/src/soc/intel/skylake/smi.c index f11a9d8c26..67c3bb8e48 100644 --- a/src/soc/intel/skylake/smi.c +++ b/src/soc/intel/skylake/smi.c @@ -90,18 +90,3 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1) "d" (APM_CNT) ); } - -static void pm1_enable_pwrbtn_smi(void *unused) -{ - /* - * Enable power button SMI only before jumping to payload. This ensures - * that: - * 1. Power button SMI is enabled only after coreboot is done. - * 2. On resume path, power button SMI is not enabled and thus avoids - * any shutdowns because of power button presses due to power button - * press in resume path. - */ - pmc_update_pm1_enable(PWRBTN_EN); -} - -BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, pm1_enable_pwrbtn_smi, NULL); |