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| author | Yu-Ping Wu <yupingso@google.com> | 2019-10-24 15:13:28 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-24 07:51:36 +0000 |
| commit | c5568a145fdd0c9ccf9dff7e3bfb9ffc44328a3f (patch) | |
| tree | f2779a152c94a194e4f912e2bc80b12ae2091cb9 /src/soc | |
| parent | ed309e58b0d44f7757f7144a995ca95a94e8a52a (diff) | |
| download | coreboot-c5568a145fdd0c9ccf9dff7e3bfb9ffc44328a3f.tar.xz | |
soc/mediatek/mt8183: Correct continuation line indent
BRANCH=kukui
BUG=none
TEST=emerge-kukui coreboot
Change-Id: I9d01d24d3494f2eb28cfb411e13adf3b6717d191
Signed-off-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36285
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/mediatek/mt8183/dramc_pi_basic_api.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/mediatek/mt8183/dramc_pi_basic_api.c b/src/soc/mediatek/mt8183/dramc_pi_basic_api.c index 5901f42acc..d4a1d599fd 100644 --- a/src/soc/mediatek/mt8183/dramc_pi_basic_api.c +++ b/src/soc/mediatek/mt8183/dramc_pi_basic_api.c @@ -88,12 +88,12 @@ void dramc_sw_impedance_cal(const struct sdram_params *params, u8 term, imp_cal_result = (read32(&ch[0].phy_nao.misc_phy_rgs_cmd) >> 24) & 0x1; dramc_dbg("1. OCD DRVP=%d CALOUT=%d\n", - impx_drv, imp_cal_result); + impx_drv, imp_cal_result); if (imp_cal_result == 1 && DRVP_result == 0xff) { DRVP_result = impx_drv; dramc_dbg("1. OCD DRVP calibration OK! DRVP=%d\n", - DRVP_result); + DRVP_result); break; } } @@ -116,12 +116,12 @@ void dramc_sw_impedance_cal(const struct sdram_params *params, u8 term, imp_cal_result = (read32(&ch[0].phy_nao.misc_phy_rgs_cmd) >> 24) & 0x1; dramc_dbg("3. OCD ODTN=%d CALOUT=%d\n", - impx_drv, imp_cal_result); + impx_drv, imp_cal_result); if (imp_cal_result == 0 && ODTN_result == 0xff) { ODTN_result = impx_drv; dramc_dbg("3. OCD ODTN calibration OK! ODTN=%d\n", - ODTN_result); + ODTN_result); break; } } |