diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-22 02:18:00 +0300 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2019-01-06 01:17:54 +0000 |
commit | c70eed1e6202c928803f3e7f79161cd247a62b23 (patch) | |
tree | e46a6c87f6f13b7719fd40a9360d8d03359bfffb /src/soc | |
parent | 54efaae701dacd58621e66a8cf56812eb5304946 (diff) | |
download | coreboot-c70eed1e6202c928803f3e7f79161cd247a62b23.tar.xz |
device: Use pcidev_on_root()
Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/26484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/amd/stoneyridge/include/soc/pci_devs.h | 2 | ||||
-rw-r--r-- | src/soc/intel/baytrail/pmutil.c | 2 | ||||
-rw-r--r-- | src/soc/intel/baytrail/ramstage.c | 2 | ||||
-rw-r--r-- | src/soc/intel/baytrail/romstage/pmc.c | 2 | ||||
-rw-r--r-- | src/soc/intel/baytrail/spi.c | 2 | ||||
-rw-r--r-- | src/soc/intel/braswell/chip.c | 4 | ||||
-rw-r--r-- | src/soc/intel/braswell/pmutil.c | 2 | ||||
-rw-r--r-- | src/soc/intel/braswell/ramstage.c | 2 | ||||
-rw-r--r-- | src/soc/intel/braswell/romstage/romstage.c | 2 | ||||
-rw-r--r-- | src/soc/intel/braswell/spi.c | 2 | ||||
-rw-r--r-- | src/soc/intel/common/block/lpc/lpc_lib.c | 4 | ||||
-rw-r--r-- | src/soc/intel/fsp_baytrail/i2c.c | 6 | ||||
-rw-r--r-- | src/soc/intel/fsp_baytrail/northcluster.c | 2 | ||||
-rw-r--r-- | src/soc/intel/fsp_baytrail/pmutil.c | 2 | ||||
-rw-r--r-- | src/soc/intel/fsp_baytrail/ramstage.c | 2 | ||||
-rw-r--r-- | src/soc/intel/fsp_baytrail/spi.c | 6 | ||||
-rw-r--r-- | src/soc/intel/fsp_broadwell_de/acpi.c | 2 | ||||
-rw-r--r-- | src/soc/intel/fsp_broadwell_de/ramstage.c | 2 | ||||
-rw-r--r-- | src/soc/intel/quark/acpi.c | 5 |
19 files changed, 25 insertions, 28 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/pci_devs.h b/src/soc/amd/stoneyridge/include/soc/pci_devs.h index 5fddc52dc5..038c071a78 100644 --- a/src/soc/amd/stoneyridge/include/soc/pci_devs.h +++ b/src/soc/amd/stoneyridge/include/soc/pci_devs.h @@ -21,7 +21,7 @@ #if !defined(__SIMPLE_DEVICE__) #include <device/device.h> -#define _SOC_DEV(slot, func) dev_find_slot(0, PCI_DEVFN(slot, func)) +#define _SOC_DEV(slot, func) pcidev_on_root(slot, func) #else #include <arch/io.h> #define _SOC_DEV(slot, func) PCI_DEV(0, slot, func) diff --git a/src/soc/intel/baytrail/pmutil.c b/src/soc/intel/baytrail/pmutil.c index 06751f1a80..be870fc8b9 100644 --- a/src/soc/intel/baytrail/pmutil.c +++ b/src/soc/intel/baytrail/pmutil.c @@ -43,7 +43,7 @@ static struct device *pcu_dev; static struct device *get_pcu_dev(void) { if (pcu_dev == NULL) - pcu_dev = dev_find_slot(0, PCI_DEVFN(PCU_DEV, 0)); + pcu_dev = pcidev_on_root(PCU_DEV, 0); return pcu_dev; } #endif diff --git a/src/soc/intel/baytrail/ramstage.c b/src/soc/intel/baytrail/ramstage.c index e9925a24f5..1715198c51 100644 --- a/src/soc/intel/baytrail/ramstage.c +++ b/src/soc/intel/baytrail/ramstage.c @@ -80,7 +80,7 @@ static void fill_in_pattrs(void) struct pattrs *attrs = (struct pattrs *)pattrs_get(); attrs->cpuid = cpuid_eax(1); - dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); + dev = pcidev_on_root(LPC_DEV, LPC_FUNC); attrs->revid = pci_read_config8(dev, REVID); /* The revision to stepping IDs have two values per metal stepping. */ if (attrs->revid >= RID_D_STEPPING_START) { diff --git a/src/soc/intel/baytrail/romstage/pmc.c b/src/soc/intel/baytrail/romstage/pmc.c index b47f7dfe6c..e77d00d36c 100644 --- a/src/soc/intel/baytrail/romstage/pmc.c +++ b/src/soc/intel/baytrail/romstage/pmc.c @@ -44,7 +44,7 @@ void punit_init(void) const struct soc_intel_baytrail_config *cfg = NULL; rid = pci_read_config8(IOSF_PCI_DEV, REVID); - dev = dev_find_slot(0, PCI_DEVFN(SOC_DEV, SOC_FUNC)); + dev = pcidev_on_root(SOC_DEV, SOC_FUNC); if (dev) cfg = dev->chip_info; diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c index d893816145..81e118c4e6 100644 --- a/src/soc/intel/baytrail/spi.c +++ b/src/soc/intel/baytrail/spi.c @@ -267,7 +267,7 @@ static ich9_spi_regs *spi_regs(void) #ifdef __SMM__ pci_devfn_t dev = PCI_DEV(0, LPC_DEV, LPC_FUNC); #else - struct device *dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); + struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC); #endif pci_read_config_dword(dev, SBASE, &sbase); sbase &= ~0x1ff; diff --git a/src/soc/intel/braswell/chip.c b/src/soc/intel/braswell/chip.c index ccd6c9fe41..7a63b5b715 100644 --- a/src/soc/intel/braswell/chip.c +++ b/src/soc/intel/braswell/chip.c @@ -86,7 +86,7 @@ __weak void board_silicon_USB2_override(SILICON_INIT_UPD *params) void soc_silicon_init_params(SILICON_INIT_UPD *params) { - struct device *dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); + struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC); struct soc_intel_braswell_config *config; if (!dev) { @@ -406,7 +406,7 @@ struct pci_operations soc_pci_ops = { **/ int SocStepping(void) { - struct device *dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); + struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC); u8 revid = pci_read_config8(dev, 0x8); switch (revid & B_PCH_LPC_RID_STEPPING_MASK) { diff --git a/src/soc/intel/braswell/pmutil.c b/src/soc/intel/braswell/pmutil.c index 85384a6120..8dbb499202 100644 --- a/src/soc/intel/braswell/pmutil.c +++ b/src/soc/intel/braswell/pmutil.c @@ -44,7 +44,7 @@ static struct device *pcu_dev; static struct device *get_pcu_dev(void) { if (pcu_dev == NULL) - pcu_dev = dev_find_slot(0, PCI_DEVFN(PCU_DEV, 0)); + pcu_dev = pcidev_on_root(PCU_DEV, 0); return pcu_dev; } #endif /* ENV_SMM */ diff --git a/src/soc/intel/braswell/ramstage.c b/src/soc/intel/braswell/ramstage.c index a12db8034d..b8362cdc58 100644 --- a/src/soc/intel/braswell/ramstage.c +++ b/src/soc/intel/braswell/ramstage.c @@ -84,7 +84,7 @@ static void fill_in_pattrs(void) struct pattrs *attrs = (struct pattrs *)pattrs_get(); attrs->cpuid = cpuid_eax(1); - dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); + dev = pcidev_on_root(LPC_DEV, LPC_FUNC); attrs->revid = pci_read_config8(dev, REVID); /* The revision to stepping IDs have two values per metal stepping. */ if (attrs->revid >= RID_D_STEPPING_START) { diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c index 14eaa6b3a8..9b9a0eba5d 100644 --- a/src/soc/intel/braswell/romstage/romstage.c +++ b/src/soc/intel/braswell/romstage/romstage.c @@ -216,7 +216,7 @@ void soc_memory_init_params(struct romstage_params *params, const struct soc_intel_braswell_config *config; /* Set the parameters for MemoryInit */ - dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); + dev = pcidev_on_root(LPC_DEV, LPC_FUNC); if (!dev) { printk(BIOS_ERR, diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c index a5f835d55a..988832d09d 100644 --- a/src/soc/intel/braswell/spi.c +++ b/src/soc/intel/braswell/spi.c @@ -236,7 +236,7 @@ static ich9_spi_regs *spi_regs(void) #if ENV_SMM pci_devfn_t dev = PCI_DEV(0, LPC_DEV, LPC_FUNC); #else - struct device *dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); + struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC); #endif if (!dev) { printk(BIOS_ERR, "%s: PCI device not found", __func__); diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c index 2fe5b39c0a..fb50b7401e 100644 --- a/src/soc/intel/common/block/lpc/lpc_lib.c +++ b/src/soc/intel/common/block/lpc/lpc_lib.c @@ -265,7 +265,7 @@ static void pch_lpc_interrupt_init(void) { const struct device *dev; - dev = dev_find_slot(0, PCI_DEVFN(PCH_DEV_SLOT_LPC, 0)); + dev = pcidev_on_root(PCH_DEV_SLOT_LPC, 0); if (!dev || !dev->chip_info) return; @@ -278,7 +278,7 @@ void pch_enable_lpc(void) const struct device *dev; uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES]; - dev = dev_find_slot(0, PCI_DEVFN(PCH_DEV_SLOT_LPC, 0)); + dev = pcidev_on_root(PCH_DEV_SLOT_LPC, 0); if (!dev || !dev->chip_info) return; diff --git a/src/soc/intel/fsp_baytrail/i2c.c b/src/soc/intel/fsp_baytrail/i2c.c index 95761f3d19..22e565fd46 100644 --- a/src/soc/intel/fsp_baytrail/i2c.c +++ b/src/soc/intel/fsp_baytrail/i2c.c @@ -114,7 +114,7 @@ int i2c_init(unsigned bus) base_ptr = (char*)base_adr[bus]; /* Set the I2C-device the user wants to use */ - dev = dev_find_slot(0, PCI_DEVFN(I2C1_DEV, bus + 1)); + dev = pcidev_on_root(I2C1_DEV, bus + 1); /* Ensure we have the right PCI device */ if ((pci_read_config16(dev, 0x0) != I2C_PCI_VENDOR_ID) || @@ -171,7 +171,7 @@ int i2c_read(unsigned bus, unsigned chip, unsigned addr, int stat; /* Get base address of desired I2C-controller */ - dev = dev_find_slot(0, PCI_DEVFN(I2C1_DEV, bus + 1)); + dev = pcidev_on_root(I2C1_DEV, bus + 1); base_ptr = (char *)pci_read_config32(dev, PCI_BASE_ADDRESS_0); if (base_ptr == NULL) { printk(BIOS_INFO, "I2C: Invalid Base address\n"); @@ -230,7 +230,7 @@ int i2c_write(unsigned bus, unsigned chip, unsigned addr, int stat; /* Get base address of desired I2C-controller */ - dev = dev_find_slot(0, PCI_DEVFN(I2C1_DEV, bus + 1)); + dev = pcidev_on_root(I2C1_DEV, bus + 1); base_ptr = (char *)pci_read_config32(dev, PCI_BASE_ADDRESS_0); if (base_ptr == NULL) { return I2C_ERR_INVALID_ADR; diff --git a/src/soc/intel/fsp_baytrail/northcluster.c b/src/soc/intel/fsp_baytrail/northcluster.c index 93cd2f251d..416746d79e 100644 --- a/src/soc/intel/fsp_baytrail/northcluster.c +++ b/src/soc/intel/fsp_baytrail/northcluster.c @@ -92,7 +92,7 @@ static int get_pcie_bar(u32 *base) *base = 0; - dev = dev_find_slot(0, PCI_DEVFN(0, 0)); + dev = pcidev_on_root(0, 0); if (!dev) return 0; diff --git a/src/soc/intel/fsp_baytrail/pmutil.c b/src/soc/intel/fsp_baytrail/pmutil.c index 402842eb74..6e4a7c8ef5 100644 --- a/src/soc/intel/fsp_baytrail/pmutil.c +++ b/src/soc/intel/fsp_baytrail/pmutil.c @@ -41,7 +41,7 @@ static struct device *pcu_dev; static struct device *get_pcu_dev(void) { if (pcu_dev == NULL) - pcu_dev = dev_find_slot(0, PCI_DEVFN(PCU_DEV, 0)); + pcu_dev = pcidev_on_root(PCU_DEV, 0); return pcu_dev; } #endif diff --git a/src/soc/intel/fsp_baytrail/ramstage.c b/src/soc/intel/fsp_baytrail/ramstage.c index f4cdaa8300..754c5f5c45 100644 --- a/src/soc/intel/fsp_baytrail/ramstage.c +++ b/src/soc/intel/fsp_baytrail/ramstage.c @@ -78,7 +78,7 @@ static void fill_in_pattrs(void) struct pattrs *attrs = (struct pattrs *)pattrs_get(); attrs->cpuid = cpuid_eax(1); - dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); + dev = pcidev_on_root(LPC_DEV, LPC_FUNC); attrs->revid = pci_read_config8(dev, REVID); /* The revision to stepping IDs have two values per metal stepping. */ if (attrs->revid >= RID_D_STEPPING_START) { diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c index 4537bcc339..41d5150f4d 100644 --- a/src/soc/intel/fsp_baytrail/spi.c +++ b/src/soc/intel/fsp_baytrail/spi.c @@ -254,11 +254,9 @@ static ich9_spi_regs *spi_regs(void) uint32_t sbase; #ifdef __SMM__ - pci_devfn_t dev; - dev = PCI_DEV(0, LPC_DEV, LPC_FUNC); + pci_devfn_t dev = PCI_DEV(0, LPC_DEV, LPC_FUNC); #else - struct device *dev; - dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); + struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC); #endif pci_read_config_dword(dev, SBASE, &sbase); sbase &= ~0x1ff; diff --git a/src/soc/intel/fsp_broadwell_de/acpi.c b/src/soc/intel/fsp_broadwell_de/acpi.c index ad88313ade..0b07ea8c4c 100644 --- a/src/soc/intel/fsp_broadwell_de/acpi.c +++ b/src/soc/intel/fsp_broadwell_de/acpi.c @@ -81,7 +81,7 @@ static int acpi_sci_irq(void) { uint8_t actl = 0; static uint8_t sci_irq = 0; - struct device *dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); + struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC); /* If this function was already called, just return the stored value. */ if (sci_irq) diff --git a/src/soc/intel/fsp_broadwell_de/ramstage.c b/src/soc/intel/fsp_broadwell_de/ramstage.c index 7b94268a02..492378ec4b 100644 --- a/src/soc/intel/fsp_broadwell_de/ramstage.c +++ b/src/soc/intel/fsp_broadwell_de/ramstage.c @@ -62,7 +62,7 @@ static void fill_in_pattrs(void) attrs->cpuid = cpuid_eax(1); attrs->stepping = (attrs->cpuid & 0x0F) - 1; - dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); + dev = pcidev_on_root(LPC_DEV, LPC_FUNC); attrs->revid = pci_read_config8(dev, REVID); attrs->microcode_patch = intel_microcode_find(); attrs->address_bits = cpuid_eax(0x80000008) & 0xff; diff --git a/src/soc/intel/quark/acpi.c b/src/soc/intel/quark/acpi.c index 960b53f675..83bed34347 100644 --- a/src/soc/intel/quark/acpi.c +++ b/src/soc/intel/quark/acpi.c @@ -31,9 +31,8 @@ unsigned long acpi_fill_mcfg(unsigned long current) void acpi_fill_in_fadt(acpi_fadt_t *fadt) { - struct device *dev = dev_find_slot(0, - PCI_DEVFN(PCI_DEVICE_NUMBER_QNC_LPC, - PCI_FUNCTION_NUMBER_QNC_LPC)); + struct device *dev = pcidev_on_root(PCI_DEVICE_NUMBER_QNC_LPC, + PCI_FUNCTION_NUMBER_QNC_LPC); uint32_t gpe0_base = pci_read_config32(dev, R_QNC_LPC_GPE0BLK) & B_QNC_LPC_GPE0BLK_MASK; uint32_t pmbase = pci_read_config32(dev, R_QNC_LPC_PM1BLK) |